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00:00:09,480 --> 00:00:16,480
We
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have
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00:02:14,170 --> 00:02:21,170
been taking about minimization of Boolean
functions first by using Boolean algebra and
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then by map method by drawing a graphical
representation of the truth table and then
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00:02:31,540 --> 00:02:38,540
identifying the patterns of 1s and group them
and reduce the variables in that process,
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number of variables as well as number of terms.
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00:02:40,709 --> 00:02:47,709
If you remember we also talked about min terms
and max terms. That is we can write an expression
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00:02:54,469 --> 00:03:01,469
Boolean algebra either as sum of products
or product of sums that is AND terms combined
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with an OR gate and OR terms combined with
an AND gate. So one is called sum of products
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and the other is called product of sums because
analogous to the algebra 1 looks like a series
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00:03:22,620 --> 00:03:29,620
of product terms and sum them, the other looks
like a series of sum terms you multiply these
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sum terms as a product.
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Sometimes what happens is when you draw a
Karnaugh Map to simplify you find that there
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00:03:40,230 --> 00:03:47,230
are more 1s than 0s. The idea is to minimize
we said. The total number of terms should
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00:03:47,499 --> 00:03:53,639
be as small as possible and the number of
literals in each of these terms should be
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as few as possible. So when you have large
groups of 1s it results in many prime implicants
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and essential prime implicants. If there are
more 1s than 0s is it possible to use the
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0s and get F bar complement of F expression.
A 1 in the truth table says F is true the
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function is true and the 0 in the truth table
says the function is false. So when you group
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0s we can get an F bar expression just as
we get F expression by grouping 1s and once
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00:04:38,140 --> 00:04:45,060
I have F bar I have De Morganís Theorem to
get an F. So, that is one approach some people
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00:04:45,060 --> 00:04:50,950
use. That also depends on the type of gates
you want. It all depends on whether you want
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a sum of product as the minimum expression
or the product of sum as the minimum expression.
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So let us today see an example where we will
use 0s to simplify the logic function.
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We will use our same familiar example from
the last few classes. We will be using the
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function F is equal to A plus BC bar this
has been our example. So when you do the Karnaugh
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00:05:27,570 --> 00:05:34,570
Map for this if you remember this is the K
map where there is a one here one here one
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00:05:51,090 --> 00:05:58,090
here one here one here if you look at a truth
table you had one entry in the third row and
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00:06:00,350 --> 00:06:07,350
last four rows. The first row second and fourth
rows had 0 in the output and all other rows
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00:06:09,210 --> 00:06:16,210
have 1 in the output. And if you map it this
is what we got.
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What we did last time was to simplify this
using 1 here and then here, of course this
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00:06:33,250 --> 00:06:40,250
is a trivial example, even though there are
large number of 1s if the pattern is good
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00:06:44,670 --> 00:06:51,670
large groups of 1s together it will give you
a very small sum of product expression because
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larger and larger groups give you smaller
and smaller product terms, that way we had
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00:07:00,490 --> 00:07:06,490
a nice example. In this example we had A for
this and BC bar. But just to give you the
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00:07:06,490 --> 00:07:13,490
concept of using 0s to simplify the expression
I am going to feel these entries of the truth
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00:07:13,860 --> 00:07:20,860
table which had output false with 0s I am
going to use 0s to simplify my logic function.
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00:07:23,240 --> 00:07:30,240
So if I group these 1s and write prime implicants
I will get F expression, expression for the
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00:07:30,360 --> 00:07:32,040
output F.
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00:07:32,040 --> 00:07:39,040
If I now group these 0s and identify prime
implicants or essential prime implicants I
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00:07:40,290 --> 00:07:47,290
will get F bar is it not, whenever the function
is not true there is a 0 entry in the truth
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00:07:48,560 --> 00:07:55,040
table as well as in the Karnaugh Map. So now
I am going to group these two 0s and these
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00:07:55,040 --> 00:08:02,040
two 0s so I will call this one, prime implicant
one, prime implicant two, F bar is sum of
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00:08:08,940 --> 00:08:14,710
prime implicant 1 and sum of prime implicant
2, a combination of prime implicant 1 and
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00:08:14,710 --> 00:08:21,700
prime implicant 2 when you say sum you mean
really OR operation which is 1. This is A
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00:08:21,700 --> 00:08:28,700
bar B bar correct and this is A bar C, this
is only F bar but we want F because the problem
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00:08:46,129 --> 00:08:52,050
definition or the truth table given to you
is to implement a function F which has the
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00:08:52,050 --> 00:08:59,050
output asserted as true for the given combinations
but what we got is F bar output not asserted
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00:09:00,899 --> 00:09:07,899
or output asserted as 0 so we do not want
this but we want a complement of this and
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you know how to get the complement.
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It is by applying DeMorgans theorem on both
sides we get F which is nothing but A OR B
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because the variable gets changed into complement
where AND becomes OR, OR becomes AND, variable
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00:09:37,610 --> 00:09:44,610
gets complemented and you can simplify this
to the original F which is A plus BC bar because
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00:09:51,870 --> 00:09:58,870
now if I do this this would become A plus
AB plus AC bar plus BC bar and the view of
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the identity in the Boolean algebra if you
remember A OR AB is A so this is redundant
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similarly A OR AC bar is also A, this compared
with this gives you A so these two terms get
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knocked off so the result is A plus BC bar
and this is what this is.
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There are a couple of points I want to make
really; one is, smaller number of 1s grouping
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is easier only if they are randomly situated
actually. When 1s are nicely grouped we may
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find a simplified expression of a minimum
form. But if we had 1s and 0s spread in the
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random fashion as more 0s than 1s and more
1s than 0s then may be itís a good idea to
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go for simplification using 0s.
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The second thing is this is the expression
for F without this simplification. This simplification
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I need to prove that this is same as this,
I can stop here. This is the minimum product
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of sum. This is the sum of product expression
and this is the product of sum expression.
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So if you wanted the solution in product of
sum expression it is here, I would use this
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expression the minimum product of sum this
is a minimum sum of product.
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Just as you get a minimum sum of product expression
using Karnaugh Map I will also get a minimum
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product of sum expression using Karnaugh Map
using 0s. Where will I use that situation?
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I will use the situation where I want to have
OR gates feeding into an AND gates because
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here each product term is an AND gate and
the sum term represent an OR gate. Sum is
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equal to OR, sum is an OR operator because
you put a plus we call it sum plus it is an
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OR operation and dot is an AND operation.
Hence the sum term represents an OR gate and
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product term represents an AND gate. So if
you want to have fewer OR gates and larger
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00:12:30,839 --> 00:12:37,839
number of AND gates I will use the sum of
product expression or if I have fewer AND
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gates and larger number of OR gates I will
use this.
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00:12:42,699 --> 00:12:49,699
Thus depending on the topology as they call
it I will have either a sum of product expression
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or product of sum expression even if number
of 0s more or less even without considering
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the number of 0s and 1s in the truth table
or regardless of 0s or 1s distribution in
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00:13:02,970 --> 00:13:09,040
the truth table or the Karnaugh Map we may
sometime want to write an expression as a
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product of sum expression. In that case I
will use this approach. I will group 0s together
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and get F bar and then F but you can do one
more thing, you can skip this by reading judiciously
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because A OR B is corresponding to this you
because this I can do it mentally. Writing
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A bar and B bar and taking its complement
knocking of the bars here and removing this
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AND and putting an OR also can be done in
my mind and I can see that whenever two 0s
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are together this is A bar and this is B bar
I can write this as instead of A bar I will
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use A, I will use an OR symbol using B. That
means I will read the map as if I would read
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a product term.
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I will read a sum term as I would read a product
term except that I will remember to complement
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each variable and remember to complement each
operation. The AND operation will be written
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as OR operation and variables will be written
as its complement. So without going through
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these two steps which is of course necessary
but I am not doing something which is wrong
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but I am just trying to simplify my procedure
visualize the procedure such that these two
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things are mentally done in your mind so you
directly read the map as this. Let us take
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one more example to prove this point. This
time we will have a four variable map sigma
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m number of min terms will form the sum 1,
3, 4, 5, 9, 11, 14, 15.
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This is the map for F. I can use any variable
I will call them ABCD so the variable for
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which the min term min terms for which the
output is 1 or true or 1 which is this, 3
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which is this, 4, 5, 6, 8, 9, 10, 11, 12,
13, 14, 15 this is the distribution. So this
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is prime implicant one essential prime implicant
isthese two, this one cannot be combined in
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any other way, this is the most efficient
way of combining because this one has to be
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combined so this has to be there, this one
has to be combined, I could have combined
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this in this way but this is not necessary
because I have already taken this one into
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account and these four 1s form a prime implicant.
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Now this first term will be this which is
B bar D OR this one A bar B C bar then this
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one ABC. Simple, you have done this earlier.
There is no ambiguity here in terms of non
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essential prime implicants and all that. On
the other hand, if I try other terms have
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to be
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put in this so you represent this as sum of
product this is a product of sum so you will
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put a product which is pi, capital M for max
terms and small m for min terms so what are
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the max terms that will be there? Whatever
term is not here that will be a max term so
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there will be a 0, 2, 3, 4, 5, 6, 7, 8, 10,
11, 12, 13.
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It so happened that I equally chose just not
that, I wanted to have a large number of 1s
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and large number of 0s so it happened when
I took this example that exactly there are
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eight 1s and eight 0s. So you could have proceeded
either way proceeded using the sum of product
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way or product of sum way. If you had a specific
reason to go for a product of sum because
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you wanted to use AND gate fitting to OR gate
I will have do it using sum of products and
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if you are going to have OR gates fitting
to AND gates I should go for product of sums.
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But if you are not given a choice like that
if you are not given a condition constraint
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like that.
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In this case there are eight 1s and eight
0s I can go either way. So I will now put
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the 0s here and I will draw another map here
same map but in order to avoid cluttering
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I will redo it here 0 0 so I can group these
0s into groups of two 0s or four 0s or eight
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0s as the case may be based on the case may
be based on the adjacency rule and then try
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to read them. So these four 0s form a group,
these two 0s form a group, prime implicant,
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these two form a group so there are only three
terms and I can write F bar and then take
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a complement of that using De Morganís identity
or De Morganís theorem and then write the
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product of sum form bar, as I told you just
now a while ago I can directly read the map
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for product of sum expression by treating
a variable as its complement so when you read
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it you read it as a complement.
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Any variable is read as its complement and
an AND operator is read as an OR operator
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and vice versa. So these four 1s would be
B bar D bar if you want to write it as a sum
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of product. Since I want to write it as a
product of sum this will be B OR D. so this
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will be B OR D. you look at these four as
you would do for 1. The only difference is
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this would be read as B D if you are grouping
1s. When you are grouping 0s B would be read
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as B bar, D would be read as D bar then AND
would be read as an OR. Hence instead of B
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bar AND D bar I will read it as B OR D thatís
it. That is a simple trick if you want to
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call it. It is not a trick really it is a
procedure which is bypassing some of the logical
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steps. This is not as if it is a new concept
or anything or it is not a derivation.
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If these two were 1s I would read it as B
I would read it as A bar B C, read it as A
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OR B bar OR C bar
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and finally these two 1s if it is one then
it will be read as ABC bar where it will be
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read as A bar B bar C, this is your minimum
product of sum, this is min terms, this is
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max terms, this is 1s, this is 0s, this will
use AND gate fitting into an OR gate for the
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final output and this will use OR gate fitting
into an AND gate for the final output if both
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are identical. Your choice of using this or
that or if you are given a constraint as use
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many AND gates and only one OR gate you will
use this.
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If you are asked to do many OR gates and only
one AND gate you will use this, if we can
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use many AND gates and only one OR gate then
we will use this. Sometimes these restrictions
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are designed because of the availability of
parts because of the matching of the other
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part of the circuitry you are designing because
you may want to have an inventory of types
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of parts of the same type but in different
designs or different implementations. There
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may be several reasons why you want to go
for this and that. I also told you the other
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day how to do a four variable, five variable
map, six variable map. At some length we have
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done a four variable map, and conceptually
that is good enough. We talked about implicants,
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prime implicants, essential prime implicants,
non essential prime implicants, how to use
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a non essential prime implicant properly and
all that. We will have to now go to some examples
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of systems small 1s, we will design and think
of some real examples. so far I have been
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giving you min terms and max term lists without
any physical relationship, any physical correlation
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or anything, it is just arbitrary sum of products,
arbitrary product of sums, arbitrary 0s and
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1s in the expression or arbitrary 1s and 0s
in the truth table.
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Before we move on to some of the real life
examples I want to give you one more concept
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which is a very simple concept it is called
ìdonít care conditionî. This is called
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ìdonít care stateî. What is a ìdonít
care stateî? I have a truth table here, the
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eight rows or a map with eight cells, a map
with sixteen cells or a truth table with sixteen
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rows and we defined for each of these rows
or cells an output to be true or false asserted
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to be 1 or 0, that means you are very clear
what you want the output to be for each of
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the input combinations because based on that
condition you are designing a system or a
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circuit.
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On the other hand I may have a system a circuit,
I will define the output to be true for certain
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combinations of the inputs when it has to
be false for certain other combinations of
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the input and there may be some combination
which are not covered in both the list. I
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can give you a list of combinations in input,
how many combinations are possible with three
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inputs? Eight combinations are possible, out
of these eight combinations I will say definitely
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for certain combinations let us say for three
combinations the output has to be true and
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for another three may be the output has to
be false and then there are two combinations
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which are not defined means you may not define
it for many reasons, these combinations may
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not occur in your system or these combinations
may occur but you donít worry too much about
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that it can be 1 or 0 the output can be true
or false because it is not going to effect
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your process in anyway.
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Hence there are certain combinations in any
system any circuit, certain combinations input
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for which you will not define the inputs,
the inputs are undefined, it need not be define
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for practical reasons, such a combination
of inputs may not occur in practice or the
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practical reasons could be such a combination
of inputs if it occurs I really donít know
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I donít really care what it is because that
is not going to effect my processing in anyway.
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Whatever is the reason if you want to say
there are certain combinations of inputs for
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which I do not care that is way it is called
donít care state, I do not care what the
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output is so such cases are called ìdonít
care statesî.
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I will give you a simple example. Suppose
I want to count 4 using one hand where in
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one hand I will use only four fingers all
the time and the fifth finger will not be
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used so I will say, supposing I show a 3 like
this you know it is 3 or I put let us say
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how much I show like this, this is also 2
because these four are the fingers you will
193
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have to look at, I am not showing any sign
or whatever.
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00:30:28,330 --> 00:30:35,330
But supposing I put three and this thumb also
out I will always tell you to look at my four
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fingers and determine the condition like 3
or 2 or 1, and this finger you donít even
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00:30:47,860 --> 00:30:52,889
look at but I am showing this thumb you donít
even look at but I may put it like this, like
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00:30:52,889 --> 00:30:59,889
this but it doesnít matter because this is
not going to effect you because this is 1
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00:31:00,340 --> 00:31:07,340
or this is also 1, this is also 2 and like
that I may have four inputs otherwise three
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00:31:10,789 --> 00:31:15,820
inputs and certain combinations by four inputs
is going to affect my output so I would be
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worried about those, if it happens I have
to take some action and certain other combinations
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00:31:21,749 --> 00:31:27,720
if it happens I donít care that thing is
going to happen I donít have to take any
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action. So we can always say 0 we are only
interested in certain combinations of the
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00:31:39,999 --> 00:31:46,999
input giving a logical output 1. When that
is the case and when any other combination
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00:31:48,909 --> 00:31:54,620
is coming the output can be 0 then you are
very safe. I donít want a false output whenever
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I have a condition for which the output is
required to be 1 I need an output to be 1.
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If there is a mistake in that I will be worried
but for all other conditions I want the output
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00:32:04,610 --> 00:32:11,610
to be 0 whether they occur or not that is
one way of looking at it which is fair enough.
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I showed you eight combinations in which for
three combinations the output has to be 1
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00:32:18,039 --> 00:32:24,999
I am concerned about this, and for three other
combinations I say 0 the you donít worry,
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00:32:24,999 --> 00:32:30,009
in case I can combine all these 3 plus 2 is
equal to 5 and say for all other five combinations
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00:32:30,009 --> 00:32:33,529
I can have them and when I donít care about
the output what does it matter to you if the
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00:32:33,529 --> 00:32:40,450
output is 0. So I can say for all other combinations
other than these three I want for which I
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00:32:40,450 --> 00:32:46,360
want 1 the output is 0 I can do that. That
means I will have more 0s and less 1s. Or
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00:32:46,360 --> 00:32:50,669
I can say since I donít care about the output
those three combinations for which I want
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00:32:50,669 --> 00:32:54,889
the output to be 1 and those two combinations
for which I donít care what the output is
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00:32:54,889 --> 00:32:59,210
all the five combinations always produce an
output of 1 and I will make sure that the
217
00:32:59,210 --> 00:33:05,029
three combinations for which the output should
not be 1 for those combinations the output
218
00:33:05,029 --> 00:33:09,529
will always be 0 that is also possible. It
is a reasonable argument, either both are
219
00:33:09,529 --> 00:33:16,529
reasonable arguments. But if you are doing
so I fix this donít care condition the states
220
00:33:17,149 --> 00:33:21,919
for which you really do not worry about the
outputs the condition for which you do not
221
00:33:21,919 --> 00:33:28,090
worry about the outputs you are fixing it
as a 1 or a 0 and when you put a 1 and a map
222
00:33:28,090 --> 00:33:35,090
you have to cover it you have to enclose it
write a term.
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00:33:35,649 --> 00:33:40,889
On the other hand if you put a 0 my number
of 1s in the map gets reduced and when the
224
00:33:40,889 --> 00:33:46,320
number of 1s in the map gets reduced my expression
becomes more difficult my expression becomes
225
00:33:46,320 --> 00:33:53,320
more complex. Fewer once is longer, each term
will have more literals if the number of 1s
226
00:33:56,700 --> 00:34:01,519
is more. So I would like to use these conditions
for which I donít worry about the output,
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00:34:01,519 --> 00:34:08,310
it is an advantage. Whenever I like I will
use them as 1 in order to simplify the hardware
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00:34:08,310 --> 00:34:14,070
but I donít have to produce a 1 so whenever
it is not convenient to me I will ditch it
229
00:34:14,070 --> 00:34:21,070
and use it as a 0. The advantage of this is
I can use this donít care condition to simplify
230
00:34:22,129 --> 00:34:29,129
my hardware. For example, I have a group of
three 1s you put an extra one and make a nice
231
00:34:32,010 --> 00:34:38,309
term so there is a ìdonít care stateî and
in one of those cells I will use it as a 1
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00:34:38,309 --> 00:34:43,589
to my advantage to reduce my hardware to reduce
my term.
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00:34:43,589 --> 00:34:49,659
On the other hand if I already completed all
my 1s and there are some donít cares strewn
234
00:34:49,659 --> 00:34:55,169
around I will not bother to cover them and
write terms for it. So use it to your advantage.
235
00:34:55,169 --> 00:35:02,169
The donít care states are used to reduce
the logic, it is not necessary to use every
236
00:35:13,400 --> 00:35:14,050
one of them.
237
00:35:14,050 --> 00:35:20,910
Whichever donít care states are useful to
introduction further either the number of
238
00:35:20,910 --> 00:35:26,369
terms or in a given term if you can reduce
the number of variables we call them literals.
239
00:35:26,369 --> 00:35:33,369
I said ABC, AB bar, A bar B bar these are
all literals, A bar B bar are all literals,
240
00:35:34,109 --> 00:35:38,970
each variableís inner term is called a literal
and each is a term. There are two terms with
241
00:35:38,970 --> 00:35:45,970
two literals each, three terms with two literals,
three literals, three literals. So by using
242
00:35:46,589 --> 00:35:52,660
donít care if you can reduce it further either
the number of terms or a literal in any of
243
00:35:52,660 --> 00:35:58,450
those terms then I will use it to my advantage
use it as a 1. Otherwise I will not purposely
244
00:35:58,450 --> 00:36:03,770
go and introduce an extra term to cover a
donít care. I donít want to introduce a
245
00:36:03,770 --> 00:36:10,770
term in order to include my ìdonít care
conditionî, it is a waste. So the idea is
246
00:36:11,460 --> 00:36:12,530
always to reduce the hardware.
247
00:36:12,530 --> 00:36:19,530
The theme of this course as I said in the
beginning is reduce hardware, hardware reduction
248
00:36:20,579 --> 00:36:27,579
will result in power saving, cost saving,
size saving, space saving and everything.
249
00:36:29,020 --> 00:36:34,380
That is why we want efficient hardware but
reliable hardware, we canít knock it of arbitrarily
250
00:36:34,380 --> 00:36:39,290
and say reduce hardware. Usually fifty percent
of the terms I have reduced the hardware but
251
00:36:39,290 --> 00:36:42,920
you will not get fifty percent of marks you
will get 0 marks that is the problem. I see
252
00:36:42,920 --> 00:36:49,920
it as a digital course so whether you get
a 0 mark it is a 1 mark so it is right or
253
00:36:50,490 --> 00:36:56,880
wrong? So, reduction at what cost? It is the
reduction without losing the reliability of
254
00:36:56,880 --> 00:37:01,180
the circuit. So let us take an example of
that class I can use the same thing and put
255
00:37:01,180 --> 00:37:08,180
some donít cares. I will take for example
the same sigma M, what is the output or 1,
256
00:37:10,430 --> 00:37:17,430
what are the terms for which the output is
1? It is 1, 3, 4, 5, 9, 11, 14, 15 I donít
257
00:37:18,609 --> 00:37:25,240
want to change any of these but instead of
making all other terms as 0s I will say may
258
00:37:25,240 --> 00:37:32,240
be 6, 7, 8, and 10 are donít cares. How do
I write it? It is d for donít care some books
259
00:37:39,910 --> 00:37:46,910
use x, this d will be replaced in some books
by x, some books by phi, some books by capital
260
00:37:51,390 --> 00:37:56,099
D so all the same donít care.
261
00:37:56,099 --> 00:38:03,099
Donít care terms are, arbitrarily I put that
why not I put these four? It is 2, 6, 7, 8
262
00:38:07,210 --> 00:38:14,210
just to show the effect. I donít have an
idea of what it is going to look like. From
263
00:38:14,380 --> 00:38:20,730
the list of 0s I am arbitrarily assuming these
four terms need not to be really 0s they need
264
00:38:20,730 --> 00:38:27,000
not be 1s they need not be 0s of the output
but they can be donít cares, you donít worry
265
00:38:27,000 --> 00:38:34,000
about whether the output is a 1 or 0 for these
four conditions of input combinations. So
266
00:38:34,339 --> 00:38:41,339
my map gets modified with donít care, this
is the modified map
modified K map with donít care states.
267
00:39:20,780 --> 00:39:27,780
What are the terms for which there is 1 to
start with? These are 1s, these are 1s, these
268
00:39:28,490 --> 00:39:35,490
are 1s, and these are 1s. Now I am going to
add 2, 6, 7, 8 when I do 2, 6, 7, 8 I donít
269
00:39:38,230 --> 00:39:43,690
mark a 1 there. Remember, if I mark a 1 there
when I try to simplify this map reduce this
270
00:39:43,690 --> 00:39:49,460
map I will make an effort to include every
possible 1 that will be unnecessary waste
271
00:39:49,460 --> 00:39:53,809
of effort. So what I will do is I will have
to use another symbol. if I put a 0 again
272
00:39:53,809 --> 00:39:58,069
I may ignore them, if I put a 0 I will ignore
it, if I put a 1 I will necessarily have to
273
00:39:58,069 --> 00:40:05,069
include it so what I will do is use another
symbol I can use d or x or phi whatever is
274
00:40:05,730 --> 00:40:12,730
less. So let me use d, this is 2 , 6, 7, 8.
These four ds I have included to indicate
275
00:40:32,619 --> 00:40:37,030
the ìdonít care conditionsî of those four
combinations of the input. these four combinations
276
00:40:37,030 --> 00:40:41,609
of input in the acquired output need not be
1 it need not be 0 they can be anything, they
277
00:40:41,609 --> 00:40:47,290
can be either 1 or 0 because that does not
effect my circuit performance in anyway because
278
00:40:47,290 --> 00:40:51,819
I may not have those combinations of input
at all to start with or even if it does occur
279
00:40:51,819 --> 00:40:54,180
doesnít matter to me what happens.
280
00:40:54,180 --> 00:41:00,470
If that is the case then how do I simplify?
Now I will have more options, I would probably
281
00:41:00,470 --> 00:41:07,470
do this plus 1, 2 or need not even have it
I can have these four and these four. So this
282
00:41:30,200 --> 00:41:37,200
is my 1, this is my 2, this is my 3, prime
implicant 1 essential EPI 1, 2 and 3 essential
283
00:41:48,410 --> 00:41:49,960
prime implicants.
284
00:41:49,960 --> 00:41:56,960
Now remember, look at this and see that this
d has not been included, this d is has not
285
00:41:57,079 --> 00:42:01,680
been included so it is not mandatory. It is
not necessary to include all ds. At the same
286
00:42:01,680 --> 00:42:07,559
time I use d to my advantage I use these two
ds because they are advantageous and I am
287
00:42:07,559 --> 00:42:12,559
able to make a simpler grouping of these two
ds. If I donít have these two ds I have to
288
00:42:12,559 --> 00:42:19,559
use this as one prime implicant which will
have three literals. Now I have a prime implicant
289
00:42:20,190 --> 00:42:24,849
with has only two literals that means I am
knocking one of the inputs of my gate AND
290
00:42:24,849 --> 00:42:30,400
gate that is an advantage, it is a hardware
saving. So this is the concept of donít cares
291
00:42:30,400 --> 00:42:32,400
and how to use donít cares.
292
00:42:32,400 --> 00:42:37,490
Now let us write the expression. Once you
have donít cares then combine them we donít
293
00:42:37,490 --> 00:42:43,059
have to keep them separate any more, you can
just write the expression as if, you write
294
00:42:43,059 --> 00:42:50,059
a normal expression. So one would be A bar
B plus two would be BC plus three would be
295
00:42:58,670 --> 00:43:05,670
B bar, this is B bar and D. this is what we
got now including donít care. Out of four
296
00:43:19,520 --> 00:43:22,990
donít cares I will really use only two and
I have not used the other two because these
297
00:43:22,990 --> 00:43:29,740
two is an advantage, you exploit them to reduce
the hardware. But at the same time donít
298
00:43:29,740 --> 00:43:33,000
feel obliged to include every donít care.
It is going to be a burden to include every
299
00:43:33,000 --> 00:43:35,589
donít care because it is going to unnecessarily
give you more terms which are not recommended.
300
00:43:35,589 --> 00:43:40,500
If I want to combine this d I have to put
one more term which is not necessary. This
301
00:43:40,500 --> 00:43:44,930
one is already covered you put a d here I
will have an extra term with three literals
302
00:43:44,930 --> 00:43:50,700
which is a waste one extra NAND gate, one
extra AND gate with three inputs and that
303
00:43:50,700 --> 00:43:55,180
input has to fit into an OR gate that means
OR gate input also has been increased by 1
304
00:43:55,180 --> 00:44:02,180
so all those extra burden is not necessary,
it is the same thing with these three.
305
00:44:02,869 --> 00:44:09,869
Originally we had this expression, we now
have that expression B bar D is same in both,
306
00:44:12,930 --> 00:44:18,839
these two terms have been introduced, each
by one literal. These two AND gates will now
307
00:44:18,839 --> 00:44:25,839
have the modified form with only two inputs,
here we have three inputs so that is the advantage
308
00:44:25,990 --> 00:44:32,990
in this hardware so I am having three AND
gates fitting into an OR gate. I am not writing
309
00:44:42,680 --> 00:44:47,270
the values here you know that this is A bar
so you have to come through A and inverter
310
00:44:47,270 --> 00:44:54,270
B B C D inverter so now extra two inverters
have to be also included. This is the story
311
00:44:56,270 --> 00:44:58,650
of the donít cares.
312
00:44:58,650 --> 00:45:05,650
So now we have exhausted all possibilities
of simplification. Of course I have shown
313
00:45:06,299 --> 00:45:13,299
you several things we saw in an arbitrary
fashion. What I mean is sort of arbitrary,
314
00:45:15,940 --> 00:45:22,940
the examples we took. We didnít take any
device except donít cares I tried to justify
315
00:45:23,030 --> 00:45:30,030
A plus B bar, A plus BC bar, I said can have
a combination but justifying after we do this
316
00:45:31,190 --> 00:45:33,569
circuit. But now we have to do it the other
way.
317
00:45:33,569 --> 00:45:40,530
We have to have a system like any system you
want to design what you want from that system
318
00:45:40,530 --> 00:45:47,049
for that system you write the truth table
that is the design. you identify a physical
319
00:45:47,049 --> 00:45:51,240
device system that you want, how many inputs
are there in the system, how many outputs
320
00:45:51,240 --> 00:45:55,849
are there in the system, what is the input
output relationship you want and for the input
321
00:45:55,849 --> 00:46:01,460
output relationship you want you write the
truth table and from the truth table you can
322
00:46:01,460 --> 00:46:07,220
either use Boolean algebra to simplify it
or go to Karnaugh Map and simplify it and
323
00:46:07,220 --> 00:46:11,970
you can do it the sum of products way or the
product of sum way depending on the type of
324
00:46:11,970 --> 00:46:14,160
hardware relationship you want to gain.
325
00:46:14,160 --> 00:46:21,160
Therefore what you have to do is to take simple
examples of logic functions, arithmetic functions.
326
00:46:25,200 --> 00:46:32,200
The one interesting thing is in this course
we have always been talking about logic gates
327
00:46:32,960 --> 00:46:39,960
logic means decision, true or false or AND
and OR etc. For example this function is true
328
00:46:41,670 --> 00:46:47,240
why this is called logic because this function
is true if and only if both the inputs are
329
00:46:47,240 --> 00:46:54,240
true and for all other cases the output is
false. So we think of it as a logical statement,
330
00:46:54,410 --> 00:46:58,369
logically we can make sense.
331
00:46:58,369 --> 00:47:05,369
OR gate is a logical gate. If at least one
of the inputs is true the output is true or
332
00:47:06,410 --> 00:47:13,410
an NOR gate you will say the other way. NOR
is complement of OR, only if both the inputs
333
00:47:15,309 --> 00:47:22,290
are 0 the output is 1 and in all other cases
the output is 0.
334
00:47:22,290 --> 00:47:29,290
But then I said these are all digital systems,
many times it is also computational intensive.
335
00:47:30,970 --> 00:47:37,200
You remember we talked about the computers
as the basic building blocks anything can
336
00:47:37,200 --> 00:47:44,200
be thought of as a computer. So the basic
thing in a computer is an arithmetic circuit.
337
00:47:46,299 --> 00:47:52,690
Logic also comes in occasionally but mostly
arithmetic add, subtract, multiply, divide
338
00:47:52,690 --> 00:47:55,740
and so on.
339
00:47:55,740 --> 00:48:01,210
We will see that later on in this course in
subsequent lectures. We can also build arithmetic
340
00:48:01,210 --> 00:48:08,210
using logic. Actually they are called logic
gates but we will use arithmetic gates like
341
00:48:09,670 --> 00:48:16,670
add circuit, subtract circuit and things like
that using these logic blocks. Why is logic
342
00:48:18,250 --> 00:48:25,250
same as arithmetic because there are only
two things. We are talking about binary variables
343
00:48:27,099 --> 00:48:32,569
a variable which has only two values 0 or
1 so it doesnít matter if it is arithmetic
344
00:48:32,569 --> 00:48:39,119
or logic because when you have two inputs
we have to add these two inputs but only one
345
00:48:39,119 --> 00:48:43,539
output is possible, the adder will have two
inputs and one output let us say we have to
346
00:48:43,539 --> 00:48:50,230
add two binary numbers. Two binary numbers
you are going to add I have two inputs and
347
00:48:50,230 --> 00:48:55,609
one output and each of these inputs can have
only two values and output can also have two
348
00:48:55,609 --> 00:49:02,609
values. So, if both the inputs are 0 the output
is 0 the sum of two 0s is 0 but if one of
349
00:49:04,740 --> 00:49:08,650
the input is 1 the output has to be 1, if
one is a 1 and the other is 0 the output is
350
00:49:08,650 --> 00:49:14,450
1 the sum is a 1. So sum is 0 if both the
inputs are 0, sum is 1 if one of the input
351
00:49:14,450 --> 00:49:14,700
is 1.
352
00:49:14,500 --> 00:49:21,500
What will happen if sum is 1 in both the inputs?
Then 1 1 is input both the inputs are 1 the
353
00:49:22,280 --> 00:49:28,589
sum of two 1s is 2 and I canít represent
2 but I can represent 0 or 1 so output has
354
00:49:28,589 --> 00:49:35,589
to be 0. And you should also remember to include
another output called carry output which will
355
00:49:37,299 --> 00:49:42,059
know that when both the inputs are 1 output
will be 0 even though the output is 0 sum
356
00:49:42,059 --> 00:49:47,930
is 0 it results in a carry so we will have
to know how to handle the carry. But that
357
00:49:47,930 --> 00:49:51,359
is the arithmetic part. What I am trying to
say is this is a logic function basically,
358
00:49:51,359 --> 00:49:56,609
I will have to look at the two values of the
input to determine output. If the two values
359
00:49:56,609 --> 00:50:03,140
of the input gives me the output so my logic
gates can be used for my arithmetic operations.
360
00:50:03,140 --> 00:50:08,799
So what we have done is the basic introduction
to the logic gates, introduction to Boolean
361
00:50:08,799 --> 00:50:13,270
algebra, we talked about min terms max terms,
sum of products, product of sum, Karnaugh
362
00:50:13,270 --> 00:50:20,270
Map simplification, donít cares etc but then
all of them will have to lead to the realization
363
00:50:20,559 --> 00:50:22,299
of things which we need.
364
00:50:22,299 --> 00:50:29,299
Therefore in the subsequent classes we will
take design example from combinational logic
365
00:50:29,420 --> 00:50:36,420
both logically and arithmetic how we can design
and build. that means you have to first design
366
00:50:36,440 --> 00:50:42,059
and specify a circuit, specify the inputs
and outputs and find what is the relationship
367
00:50:42,059 --> 00:50:45,859
between input and output, represent from my
truth table and use the tools that you have
368
00:50:45,859 --> 00:50:50,240
learnt, Boolean algebra or Karnaugh Map with
or without donít cares, sum of products,
369
00:50:50,240 --> 00:50:53,670
product of sum, etc then finally come up with
the simplification and that simplification
370
00:50:53,670 --> 00:50:59,760
will be drawn in terms of true gates and that
gate circuit will work as an arithmetic circuit
371
00:50:59,760 --> 00:51:06,760
so the logic circuit will become an arithmetic
circuit. We will see in subsequent lectures.
372