Course Name: Compiler Design

Course abstract

Compilers have become part and parcel of today’s computer systems. They are responsible for making the user’s computing requirements, specified as a piece of program, understandable to the underlying machine. There tools work as interface between the entities of two different domains – the human being and the machine. The actual process involved in this transformation is quite complex. Automata Theory provides the base of the course on which several automated tools can be designed to be used at various phases of a compiler. Advances in computer architecture, memory management and operating systems provide the compiler designer large number of options to try out for efficient code generation. This course on compiler design is to address all these issues, starting from the theoretical foundations to the architectural issues to automated tools. Being primarily targeted to a one-semester course for the undergraduate students, the course will follow the current GATE syllabus, enabling the students to prepare well for the same. It can also help all other participants looking for an introduction to the domain of compiler designs and code translators.


Course Instructor

Media Object

Prof. Santanu Chattopadhyay

Santanu Chattopadhyay received his BE degree in Computer Science and Technology from Calcutta University (B.E. College) in 1990. He received M.Tech in Computer and Information Technology and PhD in Computer Science and Engineering from Indian Institute of Technology Kharagpur in 1992 and 1996, respectively. He is currently a Professor in the Department of Electronics and Electrical Communication Engineering, IIT Kharagpur. Prior to this, he had been a faculty member in the IIEST Sibpur and IIT Guwahati in the departments of Computer Science and Engineering. In both these places he has taught the subject of Compiler Design several times. His research interests include Digital Design, Embedded Systems, System-on-Chip (SoC) and Network-on-Chip (NoC) Design and Test, Power- and Thermal-aware Testing of VLSI Circuits and Systems. He has published more than 150 papers in reputed international journals and conferences.
More info

Teaching Assistant(s)

Hillol Maity

MS

KAUSHIK KHATUA

P.hD

 Course Duration : Jan-Apr 2020

  View Course

 Syllabus

 Enrollment : 18-Nov-2019 to 03-Feb-2020

 Exam registration : 16-Dec-2019 to 20-Mar-2020

 Exam Date : 25-Apr-2020

Enrolled

8435

Registered

Certificate Eligible

Will be announced

Certified Category Count

Gold

Will be announced

Elite

Will be announced

Successfully completed

Will be announced

Participation

Will be announced

Success

Elite

Gold





Legend

Final Score Calculation Logic

Toppers list will be updated shortly....!

Enrollment Statistics

Total Enrollment: 8435

Registration Statistics

Total Registration : 707

Assignment Statistics




Assignment Score

Graph will be updated shortly...!

Score Distribution Graph - Legend

Assignment Score: Distribution of average scores garnered by students per assignment.
Exam Score : Distribution of the final exam score of students.
Final Score : Distribution of the combined score of assignments and final exam, based on the score logic.