Module NameDownloadDescriptionDownload Size
IntroductionIntroductionIntroduction517 kb
Digital System DesignDigital System DesignDigital System Design1900 kb
Programmable Logic Devices (PLD)Programmable Logic Devices (PLD)Programmable Logic Devices (PLD)2600 kb
Field Programmable Gate Arrays (FPGAs)Field Programmable Gate Arrays (FPGAs)Field Programmable Gate Arrays (FPGAs)2400 kb

Sl.No Chapter Name English
1Course Contents, ObjectivePDF unavailable
2Revision of PrerequisitePDF unavailable
3Design of Synchronous Sequential CircuitsPDF unavailable
4Analysis of Synchronous Sequential CircuitsPDF unavailable
5Top-down DesignPDF unavailable
6Controller DesignPDF unavailable
7Control algorithm and State diagramPDF unavailable
8Case study 1PDF unavailable
9Entity, Architecture and OperatorsPDF unavailable
10Concurrency, Data flow and Behavioural modelsPDF unavailable
11Structural Model, SimulationPDF unavailable
12Simulating ConcurrencyPDF unavailable
13Classes and Data typesPDF unavailable
14Concurrent statements and Sequential statementsPDF unavailable
15Sequential statements and LoopsPDF unavailable
16Modelling flip-flops, RegistersPDF unavailable
17Synthesis of Sequential circuitsPDF unavailable
18Libraries and PackagesPDF unavailable
19Operators, Delay modellingPDF unavailable
20Delay modellingPDF unavailable
21VHDL ExamplesPDF unavailable
22VHDL Examples, FSM ClockPDF unavailable
23FSM issues 1PDF unavailable
24FSM Issues 2PDF unavailable
25FSM Issues 3PDF unavailable
26VHDL coding of FSMPDF unavailable
27FSM Issues 4PDF unavailable
28FSM Issues 5PDF unavailable
29Synchronization 1PDF unavailable
30Synchronization 2PDF unavailable
31Evolution of PLDsPDF unavailable
32Simple PLDsPDF unavailable
33Simple PLDs: FittingPDF unavailable
34Complex PLDsPDF unavailable
35FPGA IntroductionPDF unavailable
36FPGA Interconnection, Design MethodologyPDF unavailable
37Xilinx Virtex FPGAs CLBPDF unavailable
38Xilinx Virtex Resource Mapping, IO BlockPDF unavailable
39Xilinx Virtex Clock TreePDF unavailable
40FPGA ConfigurationPDF unavailable
41Altera and Actel FPGAsPDF unavailable
42VHDL Test benchPDF unavailable
43Case study 2PDF unavailable
44Case study on FPGA BoardPDF unavailable

Sl.No Language Book link
1EnglishNot Available
2BengaliNot Available
3GujaratiNot Available
4HindiNot Available
5KannadaNot Available
6MalayalamNot Available
7MarathiNot Available
8TamilNot Available
9TeluguNot Available