Modules / Lectures
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Sl.No Chapter Name MP4 Download Transcript Download
1Lecture 1 : Introduction to VLSI Design FlowDownloadPDF unavailable
2Lecture 2 : Introduction to VLSI Design FlowDownloadPDF unavailable
3Lecture 3 : Introduction to VLSI Design FlowDownloadPDF unavailable
4Lecture 4 : Algorithm to Efficient Architecture MappingDownloadPDF unavailable
5Lecture 5 : Algorithm to Efficient Architecture Mapping(Contd.)DownloadPDF unavailable
6Lecture 6 : Algorithm to Efficient Architecture Mapping(Contd.DownloadPDF unavailable
7Lecture 7 : Tutorial on Algorithm to Efficient Architecture MappingDownloadPDF unavailable
8Lecture 8 : Algorithm to Efficient Architecture Mapping(Contd.DownloadPDF unavailable
9Lecture 9 : Algorithm to Efficient Architecture Mapping(Contd.DownloadPDF unavailable
10Lecture 10 : Algorithm to Efficient Architecture Mapping(Contd.DownloadPDF unavailable
11Lecture 11 : Algorithm to Efficient Architecture Mapping(Contd.DownloadPDF unavailable
12Lecture 12 : Algorithm to Efficient Architecture Mapping(Contd.DownloadPDF unavailable
13Lecture 13 : Algorithm to Efficient Architecture MappingDownloadPDF unavailable
14Lecture 14 : Algorithm to Efficient Architecture Mapping(Contd.)DownloadPDF unavailable
15Lecture 15 : Efficient Adder ArchitectureDownloadPDF unavailable
16Lecture 16 : Efficient Adder Architecture (Contd.)DownloadPDF unavailable
17Lecture 17 : Efficient Adder Architecture (Contd.)DownloadPDF unavailable
18Lecture 18 : Efficient Adder ArchitectureDownloadPDF unavailable
19Lecture 19 : Efficient Adder ArchitectureDownloadPDF unavailable
20Lecture 20 : Efficient Adder ArchitectureDownloadPDF unavailable
21Lecture 21 : Efficient Adder ArchitectureDownloadPDF unavailable
22Lecture 22 : Efficient Adder ArchitectureDownloadPDF unavailable
23Lecture 23 : Efficient Adder ArchitectureDownloadPDF unavailable
24Lecture 24 : Efficient Adder ArchitectureDownloadPDF unavailable
25Lecture 25 : Pipelining and Parallel ProcessingDownloadPDF unavailable
26Lecture 26 : Pipelining and Parallel ProcessingDownloadPDF unavailable
27Lecture 27 : Multiplier ArchitectureDownloadPDF unavailable
28Lecture 28 : Multiplier ArchitectureDownloadPDF unavailable
29Lecture 29 : Multiplier ArchitectureDownloadPDF unavailable
30Lecture 30 : Multiplier ArchitectureDownloadPDF unavailable
31Lecture 31: Multiplier ArchitectureDownloadPDF unavailable
32Lecture 32: Multiplier ArchitectureDownloadPDF unavailable
33Lecture 33: Multiplier ArchitectureDownloadPDF unavailable
34Lecture 34: Multiplier ArchitectureDownloadPDF unavailable
35Lecture 35: Squaring Circuit DesignDownloadPDF unavailable
36Lecture 36: Reconfigurable Constant Multiplier DesignDownloadPDF unavailable
37Lecture 37 : Reconfigurable Constant Multiplier DesignDownloadPDF unavailable
38Lecture 38 : Reconfigurable Constant Multiplier DesignDownloadPDF unavailable
39Lecture 39 : Fixed Point Number RepresentationDownloadPDF unavailable
40Lecture 40 : Fixed Point Number RepresentationDownloadPDF unavailable
41Lecture 41 : CORDIC ArchitectureDownloadPDF unavailable
42Lecture 42 : CORDIC ArchitectureDownloadPDF unavailable
43Lecture 43 : CORDIC ArchitectureDownloadPDF unavailable
44Lecture 44 : CORDIC ArchitectureDownloadPDF unavailable
45Lecture 45 : Timing AnalysisDownloadPDF unavailable
46Lecture 46 : Timing AnalysisDownloadPDF unavailable
47Lecture 47 : Timing AnalysisDownloadPDF unavailable
48Lecture 48 : Logic HazardDownloadPDF unavailable