Modules / Lectures
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noc19_cs01_Assignment1noc19_cs01_Assignment1
noc19_cs01_Assignment10noc19_cs01_Assignment10
noc19_cs01_Assignment11noc19_cs01_Assignment11
noc19_cs01_Assignment12noc19_cs01_Assignment12
noc19_cs01_Assignment2noc19_cs01_Assignment2
noc19_cs01_Assignment3noc19_cs01_Assignment3
noc19_cs01_Assignment4noc19_cs01_Assignment4
noc19_cs01_Assignment5noc19_cs01_Assignment5
noc19_cs01_Assignment6noc19_cs01_Assignment6
noc19_cs01_Assignment7noc19_cs01_Assignment7
noc19_cs01_Assignment8noc19_cs01_Assignment8
noc19_cs01_Assignment9noc19_cs01_Assignment9


Sl.No Chapter Name MP4 Download
1Lecture 01 : IntroductionDownload
2Lecture 02 : Introduction (Contd.)Download
3Lecture 03 : Introduction (Contd.)Download
4Lecture 04 : Introduction (Contd.)Download
5Lecture 05 : Introduction (Contd.)Download
6Lecture 06 : Introduction (Contd.)Download
7Lecture 07: Lexical AnalysisDownload
8Lecture 08: Lexical Analysis (Contd.)Download
9Lecture 09: Lexical Analysis (Contd.)Download
10Lecture 10: Lexical Analysis (Contd.)Download
11Lecture 11: Lexical Analysis (Contd.)Download
12Lecture 12 : Lexical Analysis (Contd.)Download
13Lecture 13 : Lexical Analysis (Contd.)Download
14Lecture 14 : Lexical Analysis (Contd.)Download
15Lecture 15 : Lexical Analysis (Contd.)Download
16Lecture 16 : ParserDownload
17Lecture 17 : Parser (Contd.)Download
18Lecture 18 : Parser (Contd.)Download
19Lecture 19 : Parser (Contd.)Download
20Lecture 20 : Parser (Contd.)Download
21Lecture 21 : Parser (Contd.)Download
22Lecture 22: Parser (Contd.)Download
23Lecture 23: Parser (Contd.)Download
24Lecture 24: Parser (Contd.)Download
25Lecture 25: Parser (Contd.)Download
26Lecture 26: Parser (Contd.)Download
27Lecture 27 : Parser (Contd.)Download
28Lecture 28 : Parser (Contd.)Download
29Lecture 29 : Parser (Contd.)Download
30Lecture 30 : Parser (Contd.)Download
31Lecture 31 : Parser (Contd.)Download
32Lecture 31: SR Latch and Introduction to Clocked Flip-FlopDownload
33Lecture 32: Edge-Triggered Flip-FlopDownload
34Lecture 33: Representations of Flip-FlopsDownload
35Lecture 34: Analysis of Sequential Logic CircuitDownload
36Lecture 35: Conversion of Flip-Flops and Flip-Flop Timing ParametersDownload
37Lecture 36: Register and Shift Register: PIPO and SISODownload
38Lecture 37: Shift Register: SIPO, PISO and Universal Shift RegisterDownload
39Lecture 38: Application of Shift RegisterDownload
40Lecture 39: Linear Feedback Shift RegisterDownload
41Lecture 40: Serial Addition, Multiplication and DivisionDownload
42Lecture 42: Type Checking(Contd.)Download
43Lecture 43: Symbol TableDownload
44Lecture 44: Symbol Table (Contd.)Download
45Lecture 45: Symbol Table (Contd.)Download
46Lecture 46: Symbol Table (Contd.) and Runtime EnvironmentDownload
47Lecture 47: Runtime EnvironmentDownload
48Lecture 48: Runtime Environment (Contd.)Download
49Lecture 49: Runtime Environment (Contd.)Download
50Lecture 50: Intermediate Code GenerationDownload
51Lecture 51: Intermediate Code Generation (Contd.)Download
52Lecture 52: Intermediate Code Generation (Contd.)Download
53Lecture 53: Intermediate Code Generation (Contd.)Download
54Lecture 54: Intermediate Code Generation (Contd.)Download
55Lecture 55: Intermediate Code Generation (Contd.)Download
56Lecture 56: Intermediate Code Generation (Contd.)Download
57Lecture 57: Intermediate Code Generation (Contd.)Download
58Lecture 58: Intermediate Code Generation (Contd.)Download
59Lecture 59: Intermediate Code Generation (Contd.)Download
60Lecture 60: Intermediate Code Generation (Contd.)Download
61Lecture 61: Intermediate Code Generation (Contd.)Download

Sl.No Chapter Name English
1Lecture 01 : IntroductionDownload
Verified
2Lecture 02 : Introduction (Contd.)Download
Verified
3Lecture 03 : Introduction (Contd.)Download
Verified
4Lecture 04 : Introduction (Contd.)Download
Verified
5Lecture 05 : Introduction (Contd.)Download
Verified
6Lecture 06 : Introduction (Contd.)Download
Verified
7Lecture 07: Lexical AnalysisDownload
To be verified
8Lecture 08: Lexical Analysis (Contd.)Download
To be verified
9Lecture 09: Lexical Analysis (Contd.)Download
To be verified
10Lecture 10: Lexical Analysis (Contd.)Download
To be verified
11Lecture 11: Lexical Analysis (Contd.)Download
To be verified
12Lecture 12 : Lexical Analysis (Contd.)Download
To be verified
13Lecture 13 : Lexical Analysis (Contd.)Download
To be verified
14Lecture 14 : Lexical Analysis (Contd.)Download
To be verified
15Lecture 15 : Lexical Analysis (Contd.)Download
To be verified
16Lecture 16 : ParserDownload
To be verified
17Lecture 17 : Parser (Contd.)Download
To be verified
18Lecture 18 : Parser (Contd.)Download
To be verified
19Lecture 19 : Parser (Contd.)Download
To be verified
20Lecture 20 : Parser (Contd.)Download
To be verified
21Lecture 21 : Parser (Contd.)Download
To be verified
22Lecture 22: Parser (Contd.)Download
To be verified
23Lecture 23: Parser (Contd.)Download
To be verified
24Lecture 24: Parser (Contd.)Download
To be verified
25Lecture 25: Parser (Contd.)Download
To be verified
26Lecture 26: Parser (Contd.)Download
To be verified
27Lecture 27 : Parser (Contd.)Download
To be verified
28Lecture 28 : Parser (Contd.)Download
To be verified
29Lecture 29 : Parser (Contd.)Download
To be verified
30Lecture 30 : Parser (Contd.)Download
To be verified
31Lecture 31 : Parser (Contd.)Download
To be verified
32Lecture 31: SR Latch and Introduction to Clocked Flip-FlopDownload
To be verified
33Lecture 32: Edge-Triggered Flip-FlopDownload
To be verified
34Lecture 33: Representations of Flip-FlopsDownload
To be verified
35Lecture 34: Analysis of Sequential Logic CircuitDownload
To be verified
36Lecture 35: Conversion of Flip-Flops and Flip-Flop Timing ParametersDownload
To be verified
37Lecture 36: Register and Shift Register: PIPO and SISODownload
To be verified
38Lecture 37: Shift Register: SIPO, PISO and Universal Shift RegisterDownload
To be verified
39Lecture 38: Application of Shift RegisterDownload
To be verified
40Lecture 39: Linear Feedback Shift RegisterDownload
To be verified
41Lecture 40: Serial Addition, Multiplication and DivisionDownload
To be verified
42Lecture 42: Type Checking(Contd.)Download
To be verified
43Lecture 43: Symbol TableDownload
To be verified
44Lecture 44: Symbol Table (Contd.)Download
To be verified
45Lecture 45: Symbol Table (Contd.)Download
To be verified
46Lecture 46: Symbol Table (Contd.) and Runtime EnvironmentDownload
To be verified
47Lecture 47: Runtime EnvironmentDownload
To be verified
48Lecture 48: Runtime Environment (Contd.)Download
To be verified
49Lecture 49: Runtime Environment (Contd.)Download
To be verified
50Lecture 50: Intermediate Code GenerationDownload
To be verified
51Lecture 51: Intermediate Code Generation (Contd.)Download
To be verified
52Lecture 52: Intermediate Code Generation (Contd.)Download
To be verified
53Lecture 53: Intermediate Code Generation (Contd.)Download
To be verified
54Lecture 54: Intermediate Code Generation (Contd.)Download
To be verified
55Lecture 55: Intermediate Code Generation (Contd.)Download
To be verified
56Lecture 56: Intermediate Code Generation (Contd.)Download
To be verified
57Lecture 57: Intermediate Code Generation (Contd.)Download
To be verified
58Lecture 58: Intermediate Code Generation (Contd.)Download
To be verified
59Lecture 59: Intermediate Code Generation (Contd.)Download
To be verified
60Lecture 60: Intermediate Code Generation (Contd.)Download
To be verified
61Lecture 61: Intermediate Code Generation (Contd.)Download
To be verified


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