Modules / Lectures
Module NameDownload
noc20_cs13_assigment_1noc20_cs13_assigment_1
noc20_cs13_assigment_10noc20_cs13_assigment_10
noc20_cs13_assigment_11noc20_cs13_assigment_11
noc20_cs13_assigment_12noc20_cs13_assigment_12
noc20_cs13_assigment_13noc20_cs13_assigment_13
noc20_cs13_assigment_2noc20_cs13_assigment_2
noc20_cs13_assigment_3noc20_cs13_assigment_3
noc20_cs13_assigment_4noc20_cs13_assigment_4
noc20_cs13_assigment_5noc20_cs13_assigment_5
noc20_cs13_assigment_6noc20_cs13_assigment_6
noc20_cs13_assigment_7noc20_cs13_assigment_7
noc20_cs13_assigment_8noc20_cs13_assigment_8
noc20_cs13_assigment_9noc20_cs13_assigment_9


Sl.No Chapter Name MP4 Download
1Lecture 01 : IntroductionDownload
2Lecture 02 : Introduction (Contd.)Download
3Lecture 03 : Introduction (Contd.)Download
4Lecture 04 : Introduction (Contd.)Download
5Lecture 05 : Introduction (Contd.)Download
6Lecture 06 : Introduction (Contd.)Download
7Lecture 07: Lexical AnalysisDownload
8Lecture 08: Lexical Analysis (Contd.)Download
9Lecture 09: Lexical Analysis (Contd.)Download
10Lecture 10: Lexical Analysis (Contd.)Download
11Lecture 11: Lexical Analysis (Contd.)Download
12Lecture 12 : Lexical Analysis (Contd.)Download
13Lecture 13 : Lexical Analysis (Contd.)Download
14Lecture 14 : Lexical Analysis (Contd.)Download
15Lecture 15 : Lexical Analysis (Contd.)Download
16Lecture 16 : ParserDownload
17Lecture 17 : Parser (Contd.)Download
18Lecture 18 : Parser (Contd.)Download
19Lecture 19 : Parser (Contd.)Download
20Lecture 20 : Parser (Contd.)Download
21Lecture 21 : Parser (Contd.)Download
22Lecture 22: Parser (Contd.)Download
23Lecture 23: Parser (Contd.)Download
24Lecture 24: Parser (Contd.)Download
25Lecture 25: Parser (Contd.)Download
26Lecture 26: Parser (Contd.)Download
27Lecture 27 : Parser (Contd.)Download
28Lecture 28 : Parser (Contd.)Download
29Lecture 29 : Parser (Contd.)Download
30Lecture 30 : Parser (Contd.)Download
31Lecture 31 : Parser (Contd.)Download
32Lecture 31: SR Latch and Introduction to Clocked Flip-FlopDownload
33Lecture 32: Edge-Triggered Flip-FlopDownload
34Lecture 33: Representations of Flip-FlopsDownload
35Lecture 34: Analysis of Sequential Logic CircuitDownload
36Lecture 35: Conversion of Flip-Flops and Flip-Flop Timing ParametersDownload
37Lecture 36: Register and Shift Register: PIPO and SISODownload
38Lecture 37: Shift Register: SIPO, PISO and Universal Shift RegisterDownload
39Lecture 38: Application of Shift RegisterDownload
40Lecture 39: Linear Feedback Shift RegisterDownload
41Lecture 40: Serial Addition, Multiplication and DivisionDownload
42Lecture 42: Type Checking(Contd.)Download
43Lecture 43: Symbol TableDownload
44Lecture 44: Symbol Table (Contd.)Download
45Lecture 45: Symbol Table (Contd.)Download
46Lecture 46: Symbol Table (Contd.) and Runtime EnvironmentDownload
47Lecture 47: Runtime EnvironmentDownload
48Lecture 48: Runtime Environment (Contd.)Download
49Lecture 49: Runtime Environment (Contd.)Download
50Lecture 50: Intermediate Code GenerationDownload
51Lecture 51: Intermediate Code Generation (Contd.)Download
52Lecture 52: Intermediate Code Generation (Contd.)Download
53Lecture 53: Intermediate Code Generation (Contd.)Download
54Lecture 54: Intermediate Code Generation (Contd.)Download
55Lecture 55: Intermediate Code Generation (Contd.)Download
56Lecture 56: Intermediate Code Generation (Contd.)Download
57Lecture 57: Intermediate Code Generation (Contd.)Download
58Lecture 58: Intermediate Code Generation (Contd.)Download
59Lecture 59: Intermediate Code Generation (Contd.)Download
60Lecture 60: Intermediate Code Generation (Contd.)Download
61Lecture 61: Intermediate Code Generation (Contd.)Download

Sl.No Chapter Name English
1Lecture 01 : IntroductionDownload
Verified
2Lecture 02 : Introduction (Contd.)Download
Verified
3Lecture 03 : Introduction (Contd.)Download
Verified
4Lecture 04 : Introduction (Contd.)Download
Verified
5Lecture 05 : Introduction (Contd.)Download
Verified
6Lecture 06 : Introduction (Contd.)Download
Verified
7Lecture 07: Lexical AnalysisDownload
Verified
8Lecture 08: Lexical Analysis (Contd.)Download
Verified
9Lecture 09: Lexical Analysis (Contd.)Download
Verified
10Lecture 10: Lexical Analysis (Contd.)Download
Verified
11Lecture 11: Lexical Analysis (Contd.)Download
Verified
12Lecture 12 : Lexical Analysis (Contd.)Download
Verified
13Lecture 13 : Lexical Analysis (Contd.)Download
Verified
14Lecture 14 : Lexical Analysis (Contd.)Download
Verified
15Lecture 15 : Lexical Analysis (Contd.)Download
Verified
16Lecture 16 : ParserDownload
Verified
17Lecture 17 : Parser (Contd.)Download
Verified
18Lecture 18 : Parser (Contd.)Download
Verified
19Lecture 19 : Parser (Contd.)Download
Verified
20Lecture 20 : Parser (Contd.)Download
Verified
21Lecture 21 : Parser (Contd.)Download
Verified
22Lecture 22: Parser (Contd.)Download
Verified
23Lecture 23: Parser (Contd.)Download
Verified
24Lecture 24: Parser (Contd.)Download
Verified
25Lecture 25: Parser (Contd.)Download
Verified
26Lecture 26: Parser (Contd.)Download
Verified
27Lecture 27 : Parser (Contd.)Download
Verified
28Lecture 28 : Parser (Contd.)Download
Verified
29Lecture 29 : Parser (Contd.)Download
Verified
30Lecture 30 : Parser (Contd.)Download
Verified
31Lecture 31 : Parser (Contd.)Download
Verified
32Lecture 31: SR Latch and Introduction to Clocked Flip-FlopDownload
Verified
33Lecture 32: Edge-Triggered Flip-FlopDownload
Verified
34Lecture 33: Representations of Flip-FlopsDownload
Verified
35Lecture 34: Analysis of Sequential Logic CircuitDownload
Verified
36Lecture 35: Conversion of Flip-Flops and Flip-Flop Timing ParametersDownload
Verified
37Lecture 36: Register and Shift Register: PIPO and SISODownload
Verified
38Lecture 37: Shift Register: SIPO, PISO and Universal Shift RegisterDownload
Verified
39Lecture 38: Application of Shift RegisterDownload
Verified
40Lecture 39: Linear Feedback Shift RegisterDownload
Verified
41Lecture 40: Serial Addition, Multiplication and DivisionDownload
Verified
42Lecture 42: Type Checking(Contd.)Download
Verified
43Lecture 43: Symbol TableDownload
Verified
44Lecture 44: Symbol Table (Contd.)Download
Verified
45Lecture 45: Symbol Table (Contd.)Download
Verified
46Lecture 46: Symbol Table (Contd.) and Runtime EnvironmentDownload
Verified
47Lecture 47: Runtime EnvironmentDownload
Verified
48Lecture 48: Runtime Environment (Contd.)Download
Verified
49Lecture 49: Runtime Environment (Contd.)Download
Verified
50Lecture 50: Intermediate Code GenerationDownload
Verified
51Lecture 51: Intermediate Code Generation (Contd.)Download
Verified
52Lecture 52: Intermediate Code Generation (Contd.)Download
Verified
53Lecture 53: Intermediate Code Generation (Contd.)Download
Verified
54Lecture 54: Intermediate Code Generation (Contd.)Download
Verified
55Lecture 55: Intermediate Code Generation (Contd.)Download
Verified
56Lecture 56: Intermediate Code Generation (Contd.)Download
Verified
57Lecture 57: Intermediate Code Generation (Contd.)Download
Verified
58Lecture 58: Intermediate Code Generation (Contd.)Download
Verified
59Lecture 59: Intermediate Code Generation (Contd.)Download
Verified
60Lecture 60: Intermediate Code Generation (Contd.)Download
Verified
61Lecture 61: Intermediate Code Generation (Contd.)Download
Verified


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