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Assignment-8_noc18_cs50_61Assignment-8_noc18_cs50_61
Assignment-9_noc18_cs50_68Assignment-9_noc18_cs50_68


Sl.No Chapter Name MP4 Download Transcript Download
1Introduction and Overview of the CourseDownloadDownload
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2Instruction Execution PrinciplesDownloadDownload
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3Introduction to Instruction PipelineDownloadDownload
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4Introduction to Superscalar PipelinesDownloadDownload
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5Instruction Pipeline & Performance - IDownloadDownload
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6Instruction Pipeline & Performance - IIDownloadDownload
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7Introduction to Cache MemoryDownloadDownload
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8Block Replacement Techniques & Write StrategyDownloadDownload
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9gem5 Simulator - An OverviewDownloadDownload
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10Cache MemoryDownloadDownload
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11Basic Cache Optimization TechniquesDownloadDownload
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12gem5 Simulator - Cache OptimisationDownloadDownload
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13Advanced Cache Optimization Techniques-IDownloadDownload
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14Advanced Cache Optimization Techniques-IIDownloadDownload
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15Cache Memory OptimizationsDownloadDownload
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16Introduction to DRAM SystemDownloadDownload
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17DRAM Controllers & Address MappingDownloadDownload
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18Address Translation MechanismsDownloadDownload
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19Main Memory ConceptsDownloadDownload
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20Introduction to Tiled Chip Multicore ProcessorsDownloadDownload
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21Routing Techniques in Network On ChipDownloadDownload
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22Network On Chip Router Micro-ArchitectureDownloadDownload
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23gem5 Simulator - NoC OptimisationDownloadDownload
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24Energy Efficient Bufferless NoC RoutersDownloadDownload
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25Sidebuffered Deflection RoutersDownloadDownload
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26Concepts in Network on ChipDownloadDownload
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27QoS of NoC and Caches in TCMP SystemsDownloadDownload
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28Emerging Trends in Network On ChipsDownloadDownload
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29Concepts in TCMP SystemsDownloadDownload
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