Modules / Lectures
Module NameDownloadDescriptionDownload Size
IntroductionModule 1module1891 kb
Scheduling, Allocation and BindingModule 2module21136 kb
Logic Optimization and SynthesisModule3module31210 kb
Temporal LogicModule4module4625 kb
Verification TechniquesModule5module51026 kb
Binary Decision DiagramModule6module6583 kb
Introduction to Digital TestingModule7module71275 kb
Fault Simulation and Testability MeasuresModule8module81372 kb
Combinational Circuit Test Pattern GenerationModule9module9794 kb
Sequential Circuit Testing and Scan ChainsModule10module10931 kb
Built in Self test (BIST)Module11module11725 kb

Sl.No Chapter Name English
1Introduction to Digital VLSI Design FlowDownload
Verified
2High Level Design RepresentationDownload
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3Transformations for High Level SynthesisDownload
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4Introduction to HLS: Scheduling, Allocation and Binding ProblemDownload
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5Scheduling Algorithms-1 Download
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6Scheduling Algorithms-2 Download
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7Binding and Allocation AlgorithmsDownload
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8Two level Boolean Logic Synthesis-1Download
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9Two level Boolean Logic Synthesis-2Download
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10Two level Boolean Logic Synthesis-3Download
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11Heuristic Minimization of Two-Level CircuitsDownload
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12Finite State Machine SynthesisDownload
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13Multilevel ImplementationDownload
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14Introduction to formal methods for design verification Download
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15Temporal Logic: Introduction and Basic OperatorsDownload
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16Syntax and Semantics of CTLDownload
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17Syntax and Semantics of CTL Continued Download
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18Equivalence between CTL FormulasDownload
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19Introduction to Model Checking Download
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20Model Checking Algorithms IDownload
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21Model Checking Algorithms IIDownload
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22Model Checking with FairnessDownload
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23Binary Decision Diagram: Introduction and constructionDownload
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24Ordered Binary Decision DiagramDownload
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25Operation on Ordered Binary Decision DiagramDownload
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26Ordered Binary Decision Diagram for State Transition SystemsDownload
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27Symbolic Model CheckingDownload
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28Introduction to Digital VLSI TestingDownload
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29Functional and Structural TestingDownload
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30Fault EquivalenceDownload
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31Fault Simulation-1Download
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32Fault Simulation-2Download
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33Fault Simulation-3Download
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34Testability Measures (SCOAP)Download
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35Introduction to Automatic Test Pattern Generation (ATPG) and ATPG AlgebrasDownload
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36D-Algorithm-1Download
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37D-Algorithm-2Download
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38ATPG for Synchronous Sequential CircuitsDownload
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39Scan Chain based Sequential Circuit Testing-1Download
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40Scan Chain based Sequential Circuit Testing-2Download
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41Built in Self Test-1 Download
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42Built in Self Test-2 Download
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43Memory Testing-1Download
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44Memory Testing-2Download
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2BengaliNot Available
3GujaratiNot Available
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