**Common Data :**** V _{DD} = 1.8V , L_{min} = 0.18µm, µ_{0N} = 350cm^{2}/V s, µ_{0P} = 100cm^{2}/V s,
|V_{TH} | = 0.55, t_{ox} = 3.8nm, λ = 0.07V^{−1}, χ = 0.1.**

**Common Data :**** V _{DD} = 1.8V , L_{min} = 0.18µm, µ_{0N} = 350cm^{2}/V s, µ_{0P} = 100cm^{2}/V s,
|V_{TH} | = 0.55, t_{ox} = 3.8nm, λ = 0.07V^{−1}, χ = 0.1.**

1. For a MOSFET operating in the linear (triode) region (ignore body eﬀect and channel- length modulation), find an expression for:

- the small-signal transconductance g
_{m} - the small-signal drain-source output resistance r
_{out}

Comment upon your findings. Is it desirable for an amplifier to work in the linear region? Explain.

2. Consider the simple MOS ampliﬁer shown in Figure 2. Assume λ = 0 and V_{DD} = 1.8V.

Figure .2

Assume that the biasing for the gate side of the MOS is taken care of.

- For maximum symmetrical swing in Vout and for a drain current of 0.8 mA, find the required value of R
_{D}. - Calculate the maximum symmetrical output swing, and also the small-signal volt- age gain in this case.
- How would the design values and the voltage gain change, if λ = 0.07 V
^{−1}?

3. Consider the circuit in Figure 3.

Figure. 3 Circuit for Q3

If I_{D} = 0.5mA, R_{D} = 1.5kΩ and R_{S} = 300Ω, calculate:

- the small-signal voltage gain
- the input voltage which will place the NMOS on the border of linear/saturation region, assuming γ = λ = 0. What would be voltage gain under this condition?

4.Consider the circuit shown in Figure 4. Assume V_{DD} = 1.8V . The amplifier has to be designed such that I_{D} = 100 µA.

Figure. 4 Circuit for Q4

- What should be the bias voltage Vb for the required I
_{D}? - What are the maximum and minimum values of V
_{out}required to keep both M_{1}and M_{2}in saturation? - Calculate the small-signal voltage gain offered by this circuit .

5. Consider the circuit shown in Figure 5.

Figure. 5 Circuit for Q5

- What are the maximum and minimum values of V
_{out}required to keep both M_{1}and M_{2}in saturation? - Obtain an expression for the small-signal voltage gain offered by this circuit.

6. Consider the circuit in Figure 6. Assume V_{DD} = 1.8 V.

Figure. 6 Circuit for Q6

- What should be the bias voltage V
_{b}if this amplifier is to provide a small-signal voltage gain of 25 ? - What are the maximum and minimum values of V
_{out}required to keep both M_{1}and M_{2}in saturation ? - How would the voltage gain change if M
_{2}were replaced by an ideal current source that provides the same current as required in part (a)?