## Lecture 1 & 2 :- Introduction to CMOS Analog VLSI Design

Common Data : VDD = 1.8V , Lmin  = 0.18µm, µ0N = 350cm2/V s, µ0P  = 100cm2/V s, |VTH | = 0.55, tox = 3.8nm, λ = 0.07V−1, χ = 0.1.

1. You are given a MOS Capacitor whose gate material has a work function of 4.1eV , oxide (SiO2) thickness is 10nm and whose body consists of p-type Silicon with doping concentration NA = 10 × 1015/cm3. Assume that the dielectric constant of SiO2 is 3.9
and that of Si is 11.68.  The electron affinity (E0 − Ec) of Silicon is 4.05eV , and the band-gap Ec −Ev  of Silicon is 1.1eV (thus, the Fermi level and work function of intrinsic Silicon is 4.6eV ). The magnitude of the electron charge q is 1.6 × 1019  Coulombs. At room temperature, assume that for Silicon, ni = 1010/cm3.

2. Plot the transit frequency of NMOS as a function of VGS for the biasing conﬁguration shown in ﬁgure Fig. 1. Calculate the transit frequency of MOSFET for VGS = 1.5V . Assume W = 1µm, L = 180nm, CGS = 1.2 ƒ F and CGD = 1 ƒ F . Given VDS = 1.8V .

Note: transit frequency is deﬁned as the frequency at which small signal current gain of the device drops to unity while the drain and source are held at ac ground. Figure .1

3. For an NMOS and PMOS device operating in saturation region sketch W/L versus VGS − VTH if

1. ID is constant
2. gm is constant

4.Plot the following parameters as function of body to source voltage of an NMOS device.

1. Effective channel length of device
2. gmb of NMOS when NMOS is in saturation and gm is constant
3. Drain current when gate and drain are biased at ﬁxed voltage

5. An NMOS device operating in subthreshold region has a ξ = 1.2 (ξ is the nonideaelity factor of subthreshold conduction). What variation in VGS results in a ten-fold change in ID ? If ID = 8µA, what is gm? Fig.6