mantle[62]:>fix cell $m $l

################### Starting Standard fix cell ####################

MSG-10   While running 'check model /work/aes_cipher_top/aes_cipher_top -level place':
CK-5 Collecting data on model aes_cipher_top .....
CK-7 Report for model /work/aes_cipher_top/aes_cipher_top
CK-6 Model /work/aes_cipher_top/aes_cipher_top passed placement-level sanity check
CK-15    Use 'report model /work/aes_cipher_top/aes_cipher_top' to view model statistics.
MSG-10   While running 'run place global /work/aes_cipher_top/aes_cipher_top -timing_effort
         low':
MPL-10   Global placement.
WIRE-48  Enabled long wire buffering prediction in the Manhattan model.
MPL-60   12194 signal nets, statistics:
MPL-61        0 of 0-pin nets,     0 of 1-pin nets,  9107 of 2-pin nets,
MPL-61      338 of 3-pin nets,   641 of 4-pin nets,   617 of 5-pin nets,
MPL-61      427 of 6-pin nets,   201 of 7-pin nets,   165 of 8-pin nets,
MPL-61      152 of 9-pin nets,    61 of 10-pin nets,
MPL-61      160 of (11 to 20-pin) nets,    40 of (21 to 30-pin) nets,
MPL-61      168 of (31 to 40-pin) nets,    88 of (41 to 50-pin) nets,
MPL-61       24 of (51 to 60-pin) nets,     2 of (61 to 70-pin) nets,
MPL-61        0 of (71 to 80-pin) nets,     0 of (81 to 90-pin) nets,
MPL-61        0 of (91 to 100-pin) nets,
MPL-61        3 of (101 pin or more) nets.
MPL-61   Net net:clk has the maximum number of pins: 555.
MPL-50   The design has 11932 movable standard cells.
MPL-110  Perform cell sizing: true.
MPL-92   Average cell width c=2.51u; Row height h=3.69u; Chip (W,H)=(400.00u 400.00u);
         (W+H)/c=319.27; (W*H)/(c*h)=17304.64.
MPL-140  After  0 steps: overlap=97.9% utilization=71.5% peak=4993.12.
MPL-140  After  3 steps: overlap=89.1% utilization=71.5% peak=322.01.
MPL-140  After  6 steps: overlap=85.3% utilization=71.5% peak=287.41.
MPL-140  After  9 steps: overlap=82.2% utilization=71.7% peak=271.04.
MPL-140  After 12 steps: overlap=80.5% utilization=71.7% peak=177.75.
MPL-140  After 15 steps: overlap=78.4% utilization=71.7% peak=92.15.
MPL-140  After 18 steps: overlap=78.0% utilization=71.9% peak=69.73.
MPL-140  After 21 steps: overlap=74.7% utilization=71.9% peak=47.60.
MPL-140  After 24 steps: overlap=73.5% utilization=71.9% peak=33.55.
MPL-140  After 27 steps: overlap=71.9% utilization=71.9% peak=33.15.
MPL-140  After 30 steps: overlap=70.5% utilization=71.9% peak=23.10.
MPL-140  After 33 steps: overlap=67.8% utilization=71.9% peak=15.08.
MPL-140  After 36 steps: overlap=63.8% utilization=71.9% peak=11.87.
MPL-140  After 39 steps: overlap=57.5% utilization=71.9% peak=9.65.
MPL-140  After 42 steps: overlap=56.3% utilization=72.1% peak=8.20.
MPL-140  After 45 steps: overlap=43.9% utilization=72.1% peak=5.74.
MPL-140  After 48 steps: overlap=38.5% utilization=72.3% peak=5.96.
MPL-27   26 cells moved to avoid macros and blockages.
MPL-140  After 51 steps: overlap=32.6% utilization=72.3% peak=4.28.
MPL-140  After 54 steps: overlap=29.2% utilization=72.3% peak=3.67.
MPL-140  After 57 steps: overlap=26.3% utilization=72.3% peak=3.53.
MPL-140  After 60 steps: overlap=23.3% utilization=72.3% peak=3.01.
MPL-140  After 63 steps: overlap=21.1% utilization=72.3% peak=2.39.
MPL-140  After 66 steps: overlap=14.0% utilization=72.3% peak=1.62.
MPL-145  Total congestion overflow: 0.48, non-blocked congestion overflow: 0.48, max
         congestion: 1.04, avg congestion: 0.40, overflow buckets: 27.
MPL-144  The estimated signal wire length is 0.484 meter.
MPL-27   66 cells moved to avoid macros and blockages.
WIRE-48  Disabled long wire buffering prediction in the Manhattan model.
MPL-11   Global placement finished successfully.
CMD-8    cputime  1.0 minutes, walltime  1.0 minutes, process memory  170.8 MB, peak memory 
         175.7 MB, command "run place global /work/aes_cipher_top/aes_cipher_top
         -timing_effort low"
MSG-10   While running 'export volcano snap/aes_cipher_top%fix-cell-place-global1.volcano':
LAVA-26  Writing library /macro_lib
LAVA-26  Writing library /cl013lv
LAVA-26  Writing library /work
LAVA-26  Writing library /magma
LAVA-900 Successfully froze lava into volcano
         snap/aes_cipher_top%fix-cell-place-global1.volcano:    1 seconds,    1 on cpu.
LAVA-248 Volcano file size: 52.1 MByte, data compression was not used.
LAVA-251 Data throughput 30.791 MB/s (1.69 s elapsed)
MSG-10   While running 'run scan optimize /work/aes_cipher_top/aes_cipher_top -effort
         medium':
SCN-345  WARNING: No scanchains defined or traced in design
         '/work/aes_cipher_top/aes_cipher_top', although scan flip-flops are present. Please
         do 'force dft scan chain' followed by 'run dft scan trace'
SCN-670  All scan chain optimizations are complete.  Wire length was reduced from 0.0000
         meters to 0.0000 meters (0.00%).
MSG-10   While running 'run gate buffer tree /work/aes_cipher_top/aes_cipher_top /cl013lv':
OPTO-163 Buffer tree generator added 0 repeaters.
MSG-10   While running 'run gate buffer wire /work/aes_cipher_top/aes_cipher_top /cl013lv
         -global':
OPTO-43  Updating global routing (equivalent of "run route global
         /work/aes_cipher_top/aes_cipher_top -point_pin -improve 0 -bw -channel_style
         -notiming -hierarchy"). 
HGR-111  G>100%%:# overflow grids; Trk>100%%(A/P): average/peak # overflow track
HGR-111  --LAYER--|     --G>85%-- |   --G>100%--|-Trk>100%(A/P)|--WireLen(m)-|
HGR-111  METAL1(H)|    8494(81.0%)|     0( 0.0%)|   0.0/0      |    0.000706 |
HGR-111  METAL2(V)|    5853(55.8%)|    86( 0.8%)|   1.0/2      |    0.088349 |
HGR-111  METAL3(H)|    3695(35.2%)|   476( 4.5%)|   1.1/3      |    0.143503 |
HGR-111  METAL4(V)|     989( 9.4%)|     0( 0.0%)|   0.0/0      |    0.055165 |
HGR-111  METAL5(H)|    3162(30.1%)|     4( 0.0%)|   1.0/1      |    0.072042 |
HGR-111  METAL6(V)|    3184(30.3%)|     0( 0.0%)|   0.0/0      |    0.077391 |
HGR-111  METAL7(H)|       6( 0.0%)|     0( 0.0%)|   0.0/0      |    0.021405 |
HGR-111  METAL8(V)|       0( 0.0%)|     0( 0.0%)|   0.0/0      |    0.015391 |
HGR-111    SUM    |   25383(30.2%)|   566( 0.6%)|   1.1/3      |    0.473955 |
OPTO-805 Updated global routing, timer. cputime:    0.2 mt. memory:  172.9 MB. peak memory: 
         179.4 MB.
OPTO-20  12193 nets are candidate for buffering.
OPTO-21  10% nets processed. Added  0 inverters and  2 buffers so far.
OPTO-21  20% nets processed. Added  0 inverters and  5 buffers so far.
OPTO-21  30% nets processed. Added  0 inverters and  5 buffers so far.
OPTO-21  40% nets processed. Added  0 inverters and  5 buffers so far.
OPTO-21  50% nets processed. Added  0 inverters and  5 buffers so far.
OPTO-21  60% nets processed. Added  0 inverters and  5 buffers so far.
OPTO-21  70% nets processed. Added  0 inverters and  5 buffers so far.
OPTO-21  80% nets processed. Added  0 inverters and  5 buffers so far.
OPTO-21  90% nets processed. Added  0 inverters and  5 buffers so far.
OPTO-21  100% nets processed. Added  0 inverters and  19 buffers so far.
OPTO-805 Completed buffering. cputime:    0.3 mt. memory:  172.9 MB. peak memory:  179.4 MB.
OPTO-22  18 Out of 12193 nets required buffering: 0 inverters were inserted and 19 buffers
         were inserted. Their names start with BW1.
CMD-8    cputime  0.3 minutes, walltime  0.3 minutes, process memory  171.5 MB, peak memory 
         179.4 MB, command "run gate buffer wire /work/aes_cipher_top/aes_cipher_top
         /cl013lv -global"
MSG-10   While running 'run gate speed /work/aes_cipher_top/aes_cipher_top /cl013lv
         -switchonly':
SPD-1    Speed up starts.
SPD-8    Worst slack = 247.2 ps
SPD-3    Speed up ends.
MSG-10   While running 'run gate speed /work/aes_cipher_top/aes_cipher_top /cl013lv':
SPD-1    Speed up starts.
SPD-8    Worst slack = 247.2 ps
SPD-3    Speed up ends.
MSG-10   While running 'run gate remap /work/aes_cipher_top/aes_cipher_top /cl013lv':
RMP-2    Worst slack = 247.2 ps area = 0.166 mm2
RMP-2    Worst slack = 247.2 ps area = 0.166 mm2
RMP-3    Rewire ends.
MSG-10   While running 'run gate speed /work/aes_cipher_top/aes_cipher_top /cl013lv -decomp':
SPD-1    Speed up starts.
SPD-8    Worst slack = 247.2 ps
SPD-3    Speed up ends.
MSG-10   While running 'run gate remap /work/aes_cipher_top/aes_cipher_top /cl013lv -decomp':
RMP-2    Worst slack = 247.2 ps area = 0.166 mm2
RMP-2    Worst slack = 247.2 ps area = 0.166 mm2
RMP-3    Rewire ends.
MSG-10   While running 'run gate buffer load /work/aes_cipher_top/aes_cipher_top /cl013lv':
OPTO-228 Worst slack = 247.2 ps
OPTO-228 Worst slack = 131.5 ps
OPTO-228 Worst slack = 40.9 ps
OPTO-228 Worst slack = 10.8 ps
OPTO-228 Worst slack =  2.4 ps
 * Output Gain Distribution * 
Gain Range       Count     Pct
------------------------------
 2.88...4.00         4    0.0%
 4.00...8.00        13    0.1%
 8.00..10.00     12072   99.9%

OPTO-3   ... Inserted  2 inverters and  0 buffers.
OPTO-152 2 inverters were inserted and 0 buffers were inserted to optimize timing/load
         violations. Their names start with BL2.
OPTO-143 Buffering did not change the slack (steady at 2.4 ps).
CMD-8    cputime  0.4 minutes, walltime  0.4 minutes, process memory  173.3 MB, peak memory 
         179.4 MB, command "run gate buffer load /work/aes_cipher_top/aes_cipher_top
         /cl013lv"
MSG-10   While running 'run gate trim /work/aes_cipher_top/aes_cipher_top /cl013lv':
OPTO-228 Worst slack = 247.2 ps
OPTO-228 Worst slack = 131.5 ps
OPTO-228 Worst slack = 40.9 ps
OPTO-228 Worst slack = 10.8 ps
OPTO-228 Worst slack =  2.4 ps
 * Output Gain Distribution * 
Gain Range       Count     Pct
------------------------------
 2.88...4.00         4    0.0%
 4.00...8.00        13    0.1%
 8.00..10.00     12074   99.9%

CMD-8    cputime  0.2 minutes, walltime  0.2 minutes, process memory  173.3 MB, peak memory 
         179.4 MB, command "run gate trim /work/aes_cipher_top/aes_cipher_top /cl013lv"
MSG-10   While running 'run gate clone /work/aes_cipher_top/aes_cipher_top /cl013lv':
OPTO-120 Copied 0 cells to drive large loads.
MSG-10   While running 'run gate redundancy /work/aes_cipher_top/aes_cipher_top /cl013lv
         -effort medium':
LRED-30  Starting redundancy removal for model aes_cipher_top
LRED-1   10% done
LRED-1   20% done
LRED-1   30% done
LRED-1   40% done
LRED-1   50% done
LRED-1   60% done
LRED-1   70% done
LRED-1   80% done
LRED-1   90% done
LRED-1   100% done
LRED-2   0 total redundancies found
LRED-32  Redundancy Removal used 1.5 seconds, memory usage now 173MB
MSG-10   While running 'check model /work/aes_cipher_top/aes_cipher_top -print
         netlist_violations':
CK-5 Collecting data on model aes_cipher_top .....
CK-7 Report for model /work/aes_cipher_top/aes_cipher_top
CK-6 Model /work/aes_cipher_top/aes_cipher_top passed logic-level sanity check
CK-15    Use 'report model /work/aes_cipher_top/aes_cipher_top' to view model statistics.
MSG-10   While running 'run place global /work/aes_cipher_top/aes_cipher_top -incremental
         -no_scan_disconnect -timing_effort low':
MPL-10   Global placement.
WIRE-48  Enabled long wire buffering prediction in the Manhattan model.
MPL-60   12215 signal nets, statistics:
MPL-61        0 of 0-pin nets,     0 of 1-pin nets,  9109 of 2-pin nets,
MPL-61      340 of 3-pin nets,   643 of 4-pin nets,   621 of 5-pin nets,
MPL-61      429 of 6-pin nets,   203 of 7-pin nets,   166 of 8-pin nets,
MPL-61      152 of 9-pin nets,    61 of 10-pin nets,
MPL-61      162 of (11 to 20-pin) nets,    41 of (21 to 30-pin) nets,
MPL-61      173 of (31 to 40-pin) nets,    86 of (41 to 50-pin) nets,
MPL-61       26 of (51 to 60-pin) nets,     0 of (61 to 70-pin) nets,
MPL-61        2 of (71 to 80-pin) nets,     0 of (81 to 90-pin) nets,
MPL-61        0 of (91 to 100-pin) nets,
MPL-61        1 of (101 pin or more) nets.
MPL-61   Net net:clk has the maximum number of pins: 555.
MPL-50   The design has 11953 movable standard cells.
MPL-110  Perform cell sizing: true.
MPL-21   Incremental mode.
MPL-92   Average cell width c=2.54u; Row height h=3.69u; Chip (W,H)=(400.00u 400.00u);
         (W+H)/c=315.38; (W*H)/(c*h)=17093.55.
MPL-140  After  0 steps: overlap=34.4% utilization=72.5% peak=4.35.
MPL-140  After  3 steps: overlap=45.9% utilization=72.5% peak=6.84.
MPL-140  After  6 steps: overlap=42.9% utilization=72.5% peak=5.47.
MPL-140  After  9 steps: overlap=34.2% utilization=72.3% peak=4.83.
MPL-140  After 12 steps: overlap=28.5% utilization=72.3% peak=3.79.
MPL-140  After 15 steps: overlap=25.3% utilization=72.3% peak=3.33.
MPL-140  After 18 steps: overlap=22.9% utilization=72.3% peak=3.43.
MPL-140  After 21 steps: overlap=20.8% utilization=72.3% peak=2.52.
MPL-140  After 24 steps: overlap=8.1% utilization=72.3% peak=1.04.
MPL-145  Total congestion overflow: 0.00, non-blocked congestion overflow: 0.00, max
         congestion: 0.83, avg congestion: 0.39, overflow buckets: 0.
MPL-144  The estimated signal wire length is 0.483 meter.
MPL-27   57 cells moved to avoid macros and blockages.
WIRE-48  Disabled long wire buffering prediction in the Manhattan model.
MPL-11   Global placement finished successfully.
CMD-8    cputime  0.4 minutes, walltime  0.4 minutes, process memory  174.7 MB, peak memory 
         179.4 MB, command "run place global /work/aes_cipher_top/aes_cipher_top
         -incremental -no_scan_disconnect -timing_effort low"
MSG-10   While running 'export volcano snap/aes_cipher_top%fix-cell-place-global2.volcano':
LAVA-26  Writing library /macro_lib
LAVA-26  Writing library /cl013lv
LAVA-26  Writing library /work
LAVA-26  Writing library /magma
LAVA-900 Successfully froze lava into volcano
         snap/aes_cipher_top%fix-cell-place-global2.volcano:    1 seconds,    1 on cpu.
LAVA-248 Volcano file size: 52.1 MByte, data compression was not used.
LAVA-251 Data throughput 31.389 MB/s (1.66 s elapsed)
MSG-10   While running 'run scan optimize /work/aes_cipher_top/aes_cipher_top -effort
         medium':
SCN-345  WARNING: No scanchains defined or traced in design
         '/work/aes_cipher_top/aes_cipher_top', although scan flip-flops are present. Please
         do 'force dft scan chain' followed by 'run dft scan trace'
SCN-670  All scan chain optimizations are complete.  Wire length was reduced from 0.0000
         meters to 0.0000 meters (0.00%).
MSG-10   While running 'run gate buffer wire /work/aes_cipher_top/aes_cipher_top /cl013lv
         -noworse':
OPTO-43  Updating global routing (equivalent of "run route global
         /work/aes_cipher_top/aes_cipher_top -point_pin -improve 0 -bw -channel_style
         -hierarchy").  This will also update the slack.
HGR-111  G>100%%:# overflow grids; Trk>100%%(A/P): average/peak # overflow track
HGR-111  --LAYER--|     --G>85%-- |   --G>100%--|-Trk>100%(A/P)|--WireLen(m)-|
HGR-111  METAL1(H)|    8587(81.9%)|     1( 0.0%)|   1.0/1      |    0.000738 |
HGR-111  METAL2(V)|    5817(55.5%)|    79( 0.7%)|   1.0/1      |    0.088436 |
HGR-111  METAL3(H)|    3695(35.2%)|   503( 4.8%)|   1.1/3      |    0.142902 |
HGR-111  METAL4(V)|     912( 8.7%)|     0( 0.0%)|   0.0/0      |    0.054569 |
HGR-111  METAL5(H)|    3202(30.5%)|     6( 0.0%)|   1.0/1      |    0.073067 |
HGR-111  METAL6(V)|    3298(31.4%)|     0( 0.0%)|   0.0/0      |    0.078751 |
HGR-111  METAL7(H)|       7( 0.0%)|     0( 0.0%)|   0.0/0      |    0.020617 |
HGR-111  METAL8(V)|       0( 0.0%)|     0( 0.0%)|   0.0/0      |    0.013904 |
HGR-111    SUM    |   25518(30.4%)|   589( 0.7%)|   1.1/3      |    0.472988 |
WIRE-21  Wire delay/capacitance mode for /work/aes_cipher_top/aes_cipher_top reset from
         manhattan to global.
HGR-111  G>100%%:# overflow grids; Trk>100%%(A/P): average/peak # overflow track
HGR-111  --LAYER--|     --G>85%-- |   --G>100%--|-Trk>100%(A/P)|--WireLen(m)-|
HGR-111  METAL1(H)|    8587(81.9%)|     1( 0.0%)|   1.0/1      |    0.000738 |
HGR-111  METAL2(V)|    5858(55.9%)|    83( 0.7%)|   1.0/1      |    0.088436 |
HGR-111  METAL3(H)|    3695(35.2%)|   503( 4.8%)|   1.1/3      |    0.142902 |
HGR-111  METAL4(V)|     912( 8.7%)|     0( 0.0%)|   0.0/0      |    0.054569 |
HGR-111  METAL5(H)|    3202(30.5%)|     6( 0.0%)|   1.0/1      |    0.073067 |
HGR-111  METAL6(V)|    3298(31.4%)|     0( 0.0%)|   0.0/0      |    0.078751 |
HGR-111  METAL7(H)|       7( 0.0%)|     0( 0.0%)|   0.0/0      |    0.020617 |
HGR-111  METAL8(V)|       0( 0.0%)|     0( 0.0%)|   0.0/0      |    0.013904 |
HGR-111    SUM    |   25559(30.4%)|   593( 0.7%)|   1.1/3      |    0.472988 |
OPTO-805 Updated global routing, timer. cputime:    0.3 mt. memory:  174.8 MB. peak memory: 
         187.4 MB.
OPTO-20  12214 nets are candidate for buffering.
OPTO-21  10% nets processed. Added  6 inverters and removed  3 buffers so far.
OPTO-21  20% nets processed. Added  6 inverters and removed  3 buffers so far.
OPTO-21  30% nets processed. Added  6 inverters and removed  3 buffers so far.
OPTO-21  40% nets processed. Added  6 inverters and removed  3 buffers so far.
OPTO-21  50% nets processed. Added  6 inverters and removed  3 buffers so far.
OPTO-21  60% nets processed. Added  6 inverters and removed  3 buffers so far.
OPTO-21  70% nets processed. Added  6 inverters and removed  3 buffers so far.
OPTO-21  80% nets processed. Added  6 inverters and removed  3 buffers so far.
OPTO-21  90% nets processed. Added  6 inverters and removed  3 buffers so far.
OPTO-21  100% nets processed. Added  16 inverters and  1 buffer so far.
OPTO-805 Completed buffering. cputime:    0.4 mt. memory:  174.8 MB. peak memory:  187.4 MB.
OPTO-43  Updating global routing (equivalent of "run route global
         /work/aes_cipher_top/aes_cipher_top -point_pin -improve 0 -hierarchy").  This will
         also update the slack.
HGR-111  G>100%%:# overflow grids; Trk>100%%(A/P): average/peak # overflow track
HGR-111  --LAYER--|     --G>85%-- |   --G>100%--|-Trk>100%(A/P)|--WireLen(m)-|
HGR-111  METAL1(H)|    8569(81.7%)|     1( 0.0%)|   1.0/1      |    0.000543 |
HGR-111  METAL2(V)|    5757(54.9%)|    83( 0.7%)|   1.0/1      |    0.087416 |
HGR-111  METAL3(H)|    3902(37.2%)|   594( 5.6%)|   1.1/3      |    0.140190 |
HGR-111  METAL4(V)|     905( 8.6%)|     0( 0.0%)|   0.0/0      |    0.054511 |
HGR-111  METAL5(H)|    3169(30.2%)|     5( 0.0%)|   1.0/1      |    0.073067 |
HGR-111  METAL6(V)|    3238(30.9%)|     0( 0.0%)|   0.0/0      |    0.077123 |
HGR-111  METAL7(H)|       2( 0.0%)|     0( 0.0%)|   0.0/0      |    0.022238 |
HGR-111  METAL8(V)|       0( 0.0%)|     0( 0.0%)|   0.0/0      |    0.017215 |
HGR-111    SUM    |   25542(30.4%)|   683( 0.8%)|   1.1/3      |    0.472308 |
HGR-111  G>100%%:# overflow grids; Trk>100%%(A/P): average/peak # overflow track
HGR-111  --LAYER--|     --G>85%-- |   --G>100%--|-Trk>100%(A/P)|--WireLen(m)-|
HGR-111  METAL1(H)|    8569(81.7%)|     1( 0.0%)|   1.0/1      |    0.000543 |
HGR-111  METAL2(V)|    5849(55.8%)|    95( 0.9%)|   1.0/1      |    0.087416 |
HGR-111  METAL3(H)|    3902(37.2%)|   594( 5.6%)|   1.1/3      |    0.140190 |
HGR-111  METAL4(V)|     905( 8.6%)|     0( 0.0%)|   0.0/0      |    0.054511 |
HGR-111  METAL5(H)|    3169(30.2%)|     5( 0.0%)|   1.0/1      |    0.073067 |
HGR-111  METAL6(V)|    3238(30.9%)|     0( 0.0%)|   0.0/0      |    0.077123 |
HGR-111  METAL7(H)|       2( 0.0%)|     0( 0.0%)|   0.0/0      |    0.022238 |
HGR-111  METAL8(V)|       0( 0.0%)|     0( 0.0%)|   0.0/0      |    0.017215 |
HGR-111    SUM    |   25634(30.5%)|   695( 0.8%)|   1.1/3      |    0.472308 |
OPTO-22  17 Out of 12214 nets required buffering: 16 inverters were inserted and 1 buffer
         was inserted. Their names start with BW2.
CMD-8    cputime  0.6 minutes, walltime  0.6 minutes, process memory  175.1 MB, peak memory 
         189.0 MB, command "run gate buffer wire /work/aes_cipher_top/aes_cipher_top
         /cl013lv -noworse"
OPTO-228 Worst slack = 244.6 ps
OPTO-228 Worst slack = 119.8 ps
OPTO-228 Worst slack = 36.5 ps
OPTO-228 Worst slack =  9.4 ps
OPTO-228 Worst slack =  2.0 ps
 * Output Gain Distribution * 
Gain Range       Count     Pct
------------------------------
 2.86...4.00         7    0.1%
 4.00...8.00        12    0.1%
 8.00..10.00     12089   99.8%

CMD-8    cputime  0.2 minutes, walltime  0.2 minutes, process memory  174.6 MB, peak memory 
         189.0 MB, command "run gate trim /work/aes_cipher_top/aes_cipher_top /cl013lv
         -smart_effort off"
MSG-10   While running 'run gate size -area -effort medium
         /work/aes_cipher_top/aes_cipher_top':
OPTO-220 Load step 1: changed: 11970, area = 0.113 mm2
OPTO-220 Load step 2: changed: 135, area = 0.113 mm2
OPTO-220 Load step 3: changed:   8, area = 0.113 mm2
OPTO-220 Load step 4: changed:   5, area = 0.113 mm2
OPTO-221 --------------- ------ --------- --------- ----- ------- ------                   
OPTO-221                  slack  #failing total -ve  max   total   area                    
OPTO-221                   (p)  endpoints slack (p)  vio    vio    (mm2)                   
OPTO-221 --------------- ------ --------- --------- ----- ------- ------                   
OPTO-221 Initial           -325       130    -13156  0.00    0.00  0.113                   
OPTO-221 Step 1            -134        78     -6125  0.00    0.00  0.113                   
OPTO-221 Step 2            -134        78     -6125  0.00    0.00  0.113                   
OPTO-221 Step 3            -125        76     -5120  0.00    0.00  0.113                   
OPTO-221 Step 4            -125        76     -5120  0.00    0.00  0.113                   
OPTO-221 Step 5             -91        27     -1327  0.00    0.00  0.113                   
OPTO-221 Step 6             -24         3       -67  0.00    0.00  0.113                   
OPTO-221 Step 7               0         0         0  0.00    0.00  0.113                   
OPTO-221 --------------- ------ --------- --------- ----- ------- ------                   
OPTO-221 Final = Step 7.                                                                   
CMD-8    cputime  0.5 minutes, walltime  0.5 minutes, process memory  176.0 MB, peak memory 
         189.0 MB, command "run gate size -area -effort medium
         /work/aes_cipher_top/aes_cipher_top"
MSG-10   While running 'run gate unbuffer /work/aes_cipher_top/aes_cipher_top /cl013lv
         -noworse':
OPTO-43  Updating global routing (equivalent of "run route global
         /work/aes_cipher_top/aes_cipher_top -point_pin -improve 0").  This will also update
         the slack.
HGR-111  G>100%%:# overflow grids; Trk>100%%(A/P): average/peak # overflow track
HGR-111  --LAYER--|     --G>85%-- |   --G>100%--|-Trk>100%(A/P)|--WireLen(m)-|
HGR-111  METAL1(H)|    9504(90.7%)|     0( 0.0%)|   0.0/0      |    0.000099 |
HGR-111  METAL2(V)|    5894(56.2%)|    48( 0.4%)|   1.0/2      |    0.084150 |
HGR-111  METAL3(H)|    4048(38.6%)|   562( 5.3%)|   1.1/2      |    0.141738 |
HGR-111  METAL4(V)|    1028( 9.8%)|     0( 0.0%)|   0.0/0      |    0.058144 |
HGR-111  METAL5(H)|    3236(30.8%)|     8( 0.0%)|   1.0/1      |    0.074062 |
HGR-111  METAL6(V)|    3162(30.1%)|     0( 0.0%)|   0.0/0      |    0.077886 |
HGR-111  METAL7(H)|       6( 0.0%)|     0( 0.0%)|   0.0/0      |    0.022691 |
HGR-111  METAL8(V)|       1( 0.0%)|     0( 0.0%)|   0.0/0      |    0.017359 |
HGR-111    SUM    |   26879(32.0%)|   618( 0.7%)|   1.0/2      |    0.476132 |
HGR-111  G>100%%:# overflow grids; Trk>100%%(A/P): average/peak # overflow track
HGR-111  --LAYER--|     --G>85%-- |   --G>100%--|-Trk>100%(A/P)|--WireLen(m)-|
HGR-111  METAL1(H)|    9506(90.7%)|     0( 0.0%)|   0.0/0      |    0.000112 |
HGR-111  METAL2(V)|    6013(57.3%)|    56( 0.5%)|   1.0/2      |    0.084139 |
HGR-111  METAL3(H)|    4046(38.6%)|   562( 5.3%)|   1.1/2      |    0.141751 |
HGR-111  METAL4(V)|    1028( 9.8%)|     0( 0.0%)|   0.0/0      |    0.058185 |
HGR-111  METAL5(H)|    3234(30.8%)|     8( 0.0%)|   1.0/1      |    0.074062 |
HGR-111  METAL6(V)|    3160(30.1%)|     0( 0.0%)|   0.0/0      |    0.077886 |
HGR-111  METAL7(H)|       6( 0.0%)|     0( 0.0%)|   0.0/0      |    0.022683 |
HGR-111  METAL8(V)|       1( 0.0%)|     0( 0.0%)|   0.0/0      |    0.017130 |
HGR-111    SUM    |   26994(32.2%)|   626( 0.7%)|   1.0/2      |    0.475950 |
OPTO-46  Model /work/aes_cipher_top/aes_cipher_top has 1607 inverters and 20 buffers.
OPTO-21  10% nets processed. Removed  0 inverters and  0 buffers so far.
OPTO-21  20% nets processed. Removed  0 inverters and  0 buffers so far.
OPTO-21  30% nets processed. Removed  0 inverters and  0 buffers so far.
OPTO-21  40% nets processed. Removed  0 inverters and  0 buffers so far.
OPTO-21  50% nets processed. Removed  0 inverters and  0 buffers so far.
OPTO-21  60% nets processed. Removed  0 inverters and  0 buffers so far.
OPTO-21  70% nets processed. Removed  0 inverters and  0 buffers so far.
OPTO-21  80% nets processed. Removed  0 inverters and  0 buffers so far.
OPTO-21  90% nets processed. Removed  0 inverters and  0 buffers so far.
OPTO-21  100% nets processed. Removed  0 inverters and  0 buffers so far.
OPTO-40  Unbuffering removed 0 inverters and removed 0 buffers.
OPTO-143 Buffering did not change the slack (steady at 1.3 ps).
CMD-8    cputime  0.4 minutes, walltime  0.4 minutes, process memory  174.9 MB, peak memory 
         189.0 MB, command "run gate unbuffer /work/aes_cipher_top/aes_cipher_top /cl013lv
         -noworse"
MSG-10   While running 'run gate buffer load /work/aes_cipher_top/aes_cipher_top /cl013lv':
OPTO-222 Initial: area = 0.113 mm2, slack = 1.29 ps, vio(max/total) = 0.00/0.00
OPTO-222 Final: area = 0.113 mm2, slack = 1.29 ps, vio(max/total) = 0.00/0.00
OPTO-444 Large load fixing did not require any buffers or inverters.
OPTO-143 Buffering did not change the slack (steady at 1.3 ps).
MSG-10   While running 'run place detail /work/aes_cipher_top/aes_cipher_top':
APL-400  Magma Detailed Area Placement
CK-7 Report for model /work/aes_cipher_top/aes_cipher_top
CK-5 Collecting data on model aes_cipher_top .....
CK-7 Report for model /work/aes_cipher_top/aes_cipher_top
CK-568   WARNING: THE MODEL /work/aes_cipher_top/aes_cipher_top contains 11754 cells which
         are off the placement grid. Use the '-print off_placement_grid_cells' option to
         print these cells)
CK-6 Model /work/aes_cipher_top/aes_cipher_top passed detailed placer-level sanity check
CK-15    Use 'report model /work/aes_cipher_top/aes_cipher_top' to view model statistics.
APL-153  Anchoring 1, timer is on.
ORCL-1   11860 cells illegal(#tot=11970); placement oracle dormant.
HDPL-49  Effective utilization=72.99% within {0.00u 0.00u 400.00u 400.00u}.
ORCL-3   11860 #cells legalized within distance of {40u 40u}, movement(avg/max)=(2u/21u), 0
         failed; placement oracle activated.
ORCL-5   Largest movement 21u: /work/aes_cipher_top/aes_cipher_top/text_in_r_reg[4] moved
         from {162.30u 313.83u} to {180.39u 310.71u}.
APL-110  10%
APL-110  20%
APL-110  30%
APL-110  40%
APL-110  50%
APL-110  60%
APL-110  70%
APL-110  80%
APL-110  90%
APL-110  100%
APL-102  Average cell moving distance: 2.4427u
APL-103  Largest cell moving distance: 21.2048u for cell text_in_r_reg[4]
CMD-8    cputime  0.4 minutes, walltime  0.4 minutes, process memory  175.0 MB, peak memory 
         189.0 MB, command "run place detail /work/aes_cipher_top/aes_cipher_top"
MSG-10   While running 'run place timing /work/aes_cipher_top/aes_cipher_top -size':
HPL-42   Design is legally placed.  Maintain legality while moving and/or resizing cells.
HPL-60   --------------- ------ --------- ---------
HPL-60                    slack  #failing total -ve
HPL-60                     (p)  endpoints slack (p)
HPL-60   --------------- ------ --------- ---------
HPL-60   Initial             -1         1        -1
HPL-60   Step 1              78         0         0
HPL-60   --------------- ------ --------- ---------
HPL-19   FINAL worst slack = 78.2ps
MSG-10   While running 'export volcano snap/aes_cipher_top%fix-cell-final.volcano':
LAVA-26  Writing library /macro_lib
LAVA-26  Writing library /cl013lv
LAVA-26  Writing library /work
LAVA-26  Writing library /magma
LAVA-900 Successfully froze lava into volcano snap/aes_cipher_top%fix-cell-final.volcano:   
         1 seconds,    1 on cpu.
LAVA-248 Volcano file size: 53.6 MByte, data compression was not used.
LAVA-251 Data throughput 30.718 MB/s (1.74 s elapsed)

################### Finished Standard fix cell ####################

CMD-8    cputime  5.7 minutes, walltime  5.8 minutes, process memory  175.7 MB, peak memory 
         189.0 MB, command "fix cell /work/aes_cipher_top/aes_cipher_top /cl013lv"