Course Name: Synthesis of Digital Systems

Course abstract

This course is about the automatic generation of digital circuits from high-level descriptions. Modern electronic systems are specified in Hardware Description Languages and are converted automatically into digital circuits. We will introduce the VHDL Hardware Description Language, and follow it up with a discussion of the basics of synthesis topics including High-level Synthesis, FSM Synthesis, Retiming, and Logic Synthesis.


Course Instructor

Media Object

Prof. Preeti Ranjan Panda

Preeti Ranjan Panda received his B. Tech. degree in Computer Science and Engineering from the Indian Institute of Technology Madras and his M. S. and Ph.D. degrees in Information and Computer Science from the University of California at Irvine. He is currently a Professor in the Department of Computer Science and Engineering at the Indian Institute of Technology Delhi. He has previously worked at Texas Instruments, Bangalore, India, and the Advanced Technology Group at Synopsys Inc., Mountain View, USA, and has been a visiting scholar at Stanford University.


Teaching Assistant(s)

Lokesh Siddhu

PhD Research Scholar, Computer Science

Sakshi Tiwari

PhD, Computer Science

 Course Duration : Jan-Apr 2018

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 Syllabus

 Enrollment : 20-Nov-2017 to 22-Jan-2018

 Exam Date : 28-Apr-2018, 29-Apr-2018