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Question: Respected Sir, I want to give signals to the gate driving ckts through FPGA. will this course be helpful
By:     Date: 2015-03-25

Answer: Dear Mohammad, Thank you for your interest in the course. The answer is Yes. It all depends on your aim and priority and type of work you are doing. Learning the course would give you good background in handling real life digital design. Regards Kuruvilla

By: Prof. Kuruvilla Varghese     Email:     Date: 2015-03-27


Question: we have a trainer kit which have a TI dsp and xilinx FPGA on it. s/w is used to convert the prog made in matlab. this process makes the system performance slow. can i move to fpga after learning from your course.
By:     Date: 2015-03-25

Answer: Dear Mohammad, Thank you for your interest in the course. The question is not very clear. If you are using System Generator tool, it generates the design from your Matlab design, at module level it should give good performance. But, I am not sure about a bit complex system, may be understanding the tool bit better can help. You are saying performance is low, without mentioning what exactly are you doing, and is difficult to comment. Also, we don't use System generator tool at all, we custom design high performance architectures. Coming to the crux of the matter, the course would give you enough background to design your own system. Regards Kuruvilla

By: Prof. Kuruvilla Varghese     Email:     Date: 2015-03-27


Question: can I skip the PLD portion without loosing anything if I want to learn only VHDL and FPGA
By:     Date: 2015-03-25

Answer: Dear Mohammad, Thank you for your interest in the course. Absolutely Yes, you can skip PLD's and learn rest of the course. Most of the modules can be learned independently, though I had interlinked the modules wherever required, but, you could ignore those parts, if you want to learn one module. All said and done, PLD is the topic that can be skipped without much issue. Regards Kuruvilla

By: Prof. Kuruvilla Varghese     Email:     Date: 2015-03-27


Question: i ve to design a control sys using fuzzy logic to give pwm pulses to my power converter module. some are saying that modelling in sys gen and then dumping will be better. i think vhdl is better. please advice the better option for my case. both will be new to me. i ve started learning from your lecs
By:     Date: 2015-07-10
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